same70b: Add support for SMC for SAME70-series #148367
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1 error, 1 warning, and 1 notice
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Process completed with exit code 1.
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ClangFormat.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
You may want to run clang-format on this change:
-#define BUS_WIDTH(node_id) COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), \
- (SMC_MODE_DBW_16_BIT), (0))
+#define BUS_WIDTH(node_id) \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), (SMC_MODE_DBW_16_BIT), (0))
-#define BANK_CONFIG(node_id) \
- { \
- .cs = DT_REG_ADDR(node_id), \
- .mode = BUS_WIDTH(node_id) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
- (SMC_MODE_WRITE_MODE), (0)) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
- (SMC_MODE_READ_MODE), (0)), \
- .setup_timing = SETUP_TIMING(node_id), \
- .pulse_timing = PULSE_TIMING(node_id), \
- .cycle_timing = CYCLE_TIMING(node_id), \
+#define BANK_CONFIG(node_id) \
+ { \
+ .cs = DT_REG_ADDR(node_id), \
+ .mode = BUS_WIDTH(node_id) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
+ (SMC_MODE_WRITE_MODE), (0)) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
+ (SMC_MODE_READ_MODE), (0)), \
+ .setup_timing = SETUP_TIMING(node_id), \
+ .pulse_timing = PULSE_TIMING(node_id), \
+ .cycle_timing = CYCLE_TIMING(node_id), \
File:drivers/memc/memc_sam_smc.c
Line:92
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Run Compliance Tests:
drivers/memc/memc_sam_smc.c#L92
drivers/memc/memc_sam_smc.c:92
-#define BUS_WIDTH(node_id) COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), \
- (SMC_MODE_DBW_16_BIT), (0))
+#define BUS_WIDTH(node_id) \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), (SMC_MODE_DBW_16_BIT), (0))
-#define BANK_CONFIG(node_id) \
- { \
- .cs = DT_REG_ADDR(node_id), \
- .mode = BUS_WIDTH(node_id) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
- (SMC_MODE_WRITE_MODE), (0)) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
- (SMC_MODE_READ_MODE), (0)), \
- .setup_timing = SETUP_TIMING(node_id), \
- .pulse_timing = PULSE_TIMING(node_id), \
- .cycle_timing = CYCLE_TIMING(node_id), \
+#define BANK_CONFIG(node_id) \
+ { \
+ .cs = DT_REG_ADDR(node_id), \
+ .mode = BUS_WIDTH(node_id) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
+ (SMC_MODE_WRITE_MODE), (0)) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
+ (SMC_MODE_READ_MODE), (0)), \
+ .setup_timing = SETUP_TIMING(node_id), \
+ .pulse_timing = PULSE_TIMING(node_id), \
+ .cycle_timing = CYCLE_TIMING(node_id), \
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