same70b: Add support for SMC for SAME70-series #148118
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5 errors, 2 warnings, and 1 notice
Run Compliance Tests:
drivers/memc/memc_sam_smc.c#L79
drivers/memc/memc_sam_smc.c:79 space prohibited after that open parenthesis '('
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Run Compliance Tests
Process completed with exit code 3.
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check-warns:
DevicetreeBindings.txt#L1
See https://docs.zephyrproject.org/latest/build/dts/bindings.html for more details.
Devicetree Bindings:'required: false' is redundant, please remove
File:dts/bindings/memory-controllers/atmel,sam-smc.yaml
Line:154
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check-warns:
Checkpatch.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#coding-style for more details.
SPACING: space prohibited after that open parenthesis '('
File:drivers/memc/memc_sam_smc.c
Line:79
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check-warns
Process completed with exit code 1.
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Run Compliance Tests:
dts/bindings/memory-controllers/atmel#L154
dts/bindings/memory-controllers/atmel,sam-smc.yaml:154 'required: false' is redundant, please remove
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check-warns:
ClangFormat.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
You may want to run clang-format on this change:
- #define BUS_WIDTH(node_id) COND_CODE_1( DT_ENUM_IDX(node_id, atmel_smc_bus_width), \
- (SMC_MODE_DBW_16_BIT), (SMC_MODE_DBW_8_BIT))
+#define BUS_WIDTH(node_id) \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), (SMC_MODE_DBW_16_BIT), \
+ (SMC_MODE_DBW_8_BIT))
#else
- #define BUS_WIDTH(node_id) (0)
+#define BUS_WIDTH(node_id) (0)
#endif
-#define BANK_CONFIG(node_id) \
- { \
- .cs = DT_REG_ADDR(node_id), \
- .mode = BUS_WIDTH(node_id) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
- (SMC_MODE_WRITE_MODE), (0)) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
- (SMC_MODE_READ_MODE), (0)), \
- .setup_timing = SETUP_TIMING(node_id), \
- .pulse_timing = PULSE_TIMING(node_id), \
- .cycle_timing = CYCLE_TIMING(node_id), \
+#define BANK_CONFIG(node_id) \
+ { \
+ .cs = DT_REG_ADDR(node_id), \
+ .mode = BUS_WIDTH(node_id) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
+ (SMC_MODE_WRITE_MODE), (0)) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
+ (SMC_MODE_READ_MODE), (0)), \
+ .setup_timing = SETUP_TIMING(node_id), \
+ .pulse_timing = PULSE_TIMING(node_id), \
+ .cycle_timing = CYCLE_TIMING(node_id), \
File:drivers/memc/memc_sam_smc.c
Line:96
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Run Compliance Tests:
drivers/memc/memc_sam_smc.c#L96
drivers/memc/memc_sam_smc.c:96
- #define BUS_WIDTH(node_id) COND_CODE_1( DT_ENUM_IDX(node_id, atmel_smc_bus_width), \
- (SMC_MODE_DBW_16_BIT), (SMC_MODE_DBW_8_BIT))
+#define BUS_WIDTH(node_id) \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_bus_width), (SMC_MODE_DBW_16_BIT), \
+ (SMC_MODE_DBW_8_BIT))
#else
- #define BUS_WIDTH(node_id) (0)
+#define BUS_WIDTH(node_id) (0)
#endif
-#define BANK_CONFIG(node_id) \
- { \
- .cs = DT_REG_ADDR(node_id), \
- .mode = BUS_WIDTH(node_id) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
- (SMC_MODE_WRITE_MODE), (0)) \
- | COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
- (SMC_MODE_READ_MODE), (0)), \
- .setup_timing = SETUP_TIMING(node_id), \
- .pulse_timing = PULSE_TIMING(node_id), \
- .cycle_timing = CYCLE_TIMING(node_id), \
+#define BANK_CONFIG(node_id) \
+ { \
+ .cs = DT_REG_ADDR(node_id), \
+ .mode = BUS_WIDTH(node_id) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_write_mode), \
+ (SMC_MODE_WRITE_MODE), (0)) | \
+ COND_CODE_1(DT_ENUM_IDX(node_id, atmel_smc_read_mode), \
+ (SMC_MODE_READ_MODE), (0)), \
+ .setup_timing = SETUP_TIMING(node_id), \
+ .pulse_timing = PULSE_TIMING(node_id), \
+ .cycle_timing = CYCLE_TIMING(node_id), \
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