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Open Source Verification Bundle for VHDL and System Verilog
Python 40 7
GUI editor for hardware description designs
GDScript 27 3
Co-simulation and behavioural verification with VHDL, C/C++ and Python/m
VHDL 11 6
Execute Minimal Working Examples (MWEs) defined in the body of Markdown files or GitHub issues.
Go 8 2
TeX 5 1
3