Skip to content
@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture
README.md

Welcome to the RISC-V Non-ISA Specifications 👋

RISC-V Logo

Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.4k 238

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 701 163

  3. riscv-arch-test riscv-arch-test Public

    Assembly 512 198

  4. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 346 90

  5. rvv-intrinsic-doc rvv-intrinsic-doc Public

    C 291 89

  6. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 160 47

Repositories

Showing 10 of 35 repositories
  • riscv-trace-spec Public

    RISC-V Processor Trace Specification

    riscv-non-isa/riscv-trace-spec’s past year of commit activity
    C 160 CC-BY-4.0 47 19 9 Updated Oct 30, 2024
  • riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    riscv-non-isa/riscv-sbi-doc’s past year of commit activity
    Makefile 346 CC-BY-4.0 90 17 3 Updated Oct 29, 2024
  • riscv-external-debug-security Public

    The RISC-V External Debug Security Specification

    riscv-non-isa/riscv-external-debug-security’s past year of commit activity
    Makefile 18 CC-BY-4.0 2 1 0 Updated Oct 28, 2024
  • riscv-acpi-rimt Public

    RISC-V ACPI I/O Mapping Table Specification

    riscv-non-isa/riscv-acpi-rimt’s past year of commit activity
    Makefile 2 CC-BY-4.0 2 1 0 Updated Oct 25, 2024
  • riscv-brs Public

    The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.

    riscv-non-isa/riscv-brs’s past year of commit activity
    TeX 39 CC-BY-4.0 13 22 2 Updated Oct 24, 2024
  • riscv-arch-test Public
    riscv-non-isa/riscv-arch-test’s past year of commit activity
    Assembly 512 Apache-2.0 198 65 36 Updated Oct 24, 2024
  • riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    riscv-non-isa/riscv-elf-psabi-doc’s past year of commit activity
    Python 701 CC-BY-4.0 163 54 25 Updated Oct 18, 2024
  • riscv-rpmi Public

    RISC-V Platform Management Interface Specification. OS-agnostic messaging interface for system management and control

    riscv-non-isa/riscv-rpmi’s past year of commit activity
    Makefile 6 CC-BY-4.0 8 0 1 Updated Oct 18, 2024
  • iopmp-spec Public

    This repository contains the specification source for the RISC-V IOPMP Specification. This document proposes a Physical Memory Protection Unit of Input/Output devices, IOPMP for short, to regulate the accesses issued from the bus masters.

    riscv-non-isa/iopmp-spec’s past year of commit activity
    Makefile 11 CC-BY-4.0 2 5 1 Updated Oct 17, 2024
  • rvv-intrinsic-doc Public
    riscv-non-isa/rvv-intrinsic-doc’s past year of commit activity
    C 291 BSD-3-Clause 89 23 3 Updated Oct 17, 2024
View all repositories

People

This organization has no public members. You must be a member to see who’s a part of this organization.