Move deprecated files to dedicated folder

pulp-platform · May 3, 2024 · 3eafd9a · 3eafd9a
1 parent f34d719
commit 3eafd9a
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Showing 38 changed files with 60 additions and 54 deletions.
diff --git a/Bender.yml b/Bender.yml
@@ -24,60 +24,12 @@ sources:
     # Level 1
   - rtl/ecc_wrap/ecc_manager_reg_top.sv
   - rtl/ecc_wrap/ecc_scrubber.sv
-
-  - target: any(deprecated, axi_ecc, hci_ecc, pulp_ecc, test)
-    files:
-      - rtl/ecc_concat_32_64.sv
-      - rtl/lowrisc_ecc/prim_secded_pkg.sv
-      - rtl/lowrisc_ecc/prim_secded_13_8_cor.sv
-      - rtl/lowrisc_ecc/prim_secded_13_8_dec.sv
-      - rtl/lowrisc_ecc/prim_secded_13_8_enc.sv
-      - rtl/lowrisc_ecc/prim_secded_22_16_cor.sv
-      - rtl/lowrisc_ecc/prim_secded_22_16_dec.sv
-      - rtl/lowrisc_ecc/prim_secded_22_16_enc.sv
-      - rtl/lowrisc_ecc/prim_secded_39_32_cor.sv
-      - rtl/lowrisc_ecc/prim_secded_39_32_dec.sv
-      - rtl/lowrisc_ecc/prim_secded_39_32_enc.sv
-      - rtl/lowrisc_ecc/prim_secded_72_64_cor.sv
-      - rtl/lowrisc_ecc/prim_secded_72_64_dec.sv
-      - rtl/lowrisc_ecc/prim_secded_72_64_enc.sv
-
-  - target: axi_ecc # custom ECC for PULP AXI IPs, make sure to include interface IPs when adding this target
-    files:
-      - rtl/BUS_enc_dec/AXI_bus_ecc_dec.sv
-      - rtl/BUS_enc_dec/AXI_bus_ecc_enc.sv
-  - target: hci_ecc # custom ECC for PULP HCI IPs, make sure to include interface IPs when adding this target
-    files:
-      - rtl/BUS_enc_dec/hci_core_intf_ecc_dec.sv
-      - rtl/BUS_enc_dec/hci_core_intf_ecc_enc.sv
-      - rtl/BUS_enc_dec/hci_mem_intf_ecc_dec.sv
-      - rtl/BUS_enc_dec/hci_mem_intf_ecc_enc.sv
-  - target: pulp_ecc # custom ECC for PULP (pulp_soc) interface IPs, make sure to include interface IPs when adding this target
-    files:
-      - rtl/BUS_enc_dec/PE_XBAR_bus_ecc_dec.sv
-      - rtl/BUS_enc_dec/PE_XBAR_bus_ecc_enc.sv
-      - rtl/BUS_enc_dec/TCDM_XBAR_bus_ecc_dec.sv
-      - rtl/BUS_enc_dec/TCDM_XBAR_bus_ecc_enc.sv
-      - rtl/BUS_enc_dec/XBAR_DEMUX_BUS_ecc_dec.sv
-      - rtl/BUS_enc_dec/XBAR_DEMUX_BUS_ecc_enc.sv
   - rtl/TMR_voter_detect.sv
     # Level 2
   - rtl/bitwise_TMR_voter.sv
   - rtl/ecc_wrap/ecc_manager.sv
-  - target: deprecated
-    files:
-      - rtl/ecc_wrap/ecc_sram_wrap.sv
   - rtl/ecc_wrap/ecc_sram.sv
     # Level 3
-  - target: test
-    files:
-      - test/tb_ecc_scrubber.sv
-      - test/tb_ecc_secded.sv
-      - test/tb_ecc_sram.sv
-      - test/tb_tmr_voter.sv
-      - test/tb_tmr_voter_detect.sv
-      - test/tb_tmr_word_voter.sv
-      - test/tb_bitwise_tmr_voter.sv
 
   - files:
       - rtl/HMR/hmr_pkg.sv
@@ -105,6 +57,50 @@ sources:
       - rtl/HMR/hmr_unit.sv
       - rtl/HMR/hmr_rr_wrapper.sv
 
+  - target: any(deprecated, axi_ecc, hci_ecc, pulp_ecc, test)
+    files:
+      - rtl/deprecated/ecc_concat_32_64.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_pkg.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_13_8_cor.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_13_8_dec.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_13_8_enc.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_22_16_cor.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_22_16_dec.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_22_16_enc.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_39_32_cor.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_39_32_dec.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_39_32_enc.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_72_64_cor.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_72_64_dec.sv
+      - rtl/deprecated/lowrisc_ecc/prim_secded_72_64_enc.sv
+
+  # custom ECC for PULP AXI IPs, make sure to include interface IPs when adding this target
+  - target: axi_ecc
+    files:
+      - rtl/BUS_enc_dec/AXI_bus_ecc_dec.sv
+      - rtl/BUS_enc_dec/AXI_bus_ecc_enc.sv
+  # custom ECC for PULP HCI IPs, make sure to include interface IPs when adding this target
+  - target: hci_ecc
+    files:
+      - rtl/BUS_enc_dec/hci_core_intf_ecc_dec.sv
+      - rtl/BUS_enc_dec/hci_core_intf_ecc_enc.sv
+      - rtl/BUS_enc_dec/hci_mem_intf_ecc_dec.sv
+      - rtl/BUS_enc_dec/hci_mem_intf_ecc_enc.sv
+
+  # custom ECC for PULP (pulp_soc) interface IPs, make sure to include interface IPs when adding this target
+  - target: pulp_ecc
+    files:
+      - rtl/BUS_enc_dec/PE_XBAR_bus_ecc_dec.sv
+      - rtl/BUS_enc_dec/PE_XBAR_bus_ecc_enc.sv
+      - rtl/BUS_enc_dec/TCDM_XBAR_bus_ecc_dec.sv
+      - rtl/BUS_enc_dec/TCDM_XBAR_bus_ecc_enc.sv
+      - rtl/BUS_enc_dec/XBAR_DEMUX_BUS_ecc_dec.sv
+      - rtl/BUS_enc_dec/XBAR_DEMUX_BUS_ecc_enc.sv
+
+  - target: deprecated
+    files:
+      - rtl/deprecated/ecc_sram_wrap.sv
+
   - target: any(deprecated, ODRG)
     include_dirs:
       - rtl/deprecated/ODRG_unit
@@ -122,11 +118,21 @@ sources:
       - rtl/deprecated/pulpissimo_tcls/tcls_manager_reg_top.sv
       - rtl/deprecated/pulpissimo_tcls/TCLS_unit.sv
 
+  - target: test
+    files:
+      - test/tb_ecc_scrubber.sv
+      - test/tb_ecc_secded.sv
+      - test/tb_ecc_sram.sv
+      - test/tb_tmr_voter.sv
+      - test/tb_tmr_voter_detect.sv
+      - test/tb_tmr_word_voter.sv
+      - test/tb_bitwise_tmr_voter.sv
+
 vendor_package:
   - name: lowrisc_opentitan
-    target_dir: "util/lowrisc_opentitan"
+    target_dir: "rtl/deprecated/util/lowrisc_opentitan"
     upstream: { git: "https://github.com/lowRISC/opentitan.git", rev: "cfcfbce85e182c127b8c4be5cd8bf531e0a4d927" }
-    patch_dir: "util/patches"
+    patch_dir: "rtl/deprecated/util/patches"
     mapping:
       - {from: 'util/design/secded_gen.py', to: 'util/design/secded_gen.py', patch_dir: 'lowrisc_secded_gen'}
       - {from: 'util/design/data/', to: 'util/design/data/', patch_dir: 'lowrisc_data_dir'}
diff --git a/Makefile b/Makefile
@@ -97,10 +97,6 @@ gen_ecc_registers:
 	python $(REG_TOOL) $(HJSON_ECC) -d > $(TARGET_DIR_ECC)/doc.md
 	python $(REG_TOOL) $(HJSON_ECC) -D > $(TARGET_DIR_ECC)/ECC.h
 
-gen_ECC:
-	$(BENDER) vendor init
-	cd util/lowrisc_opentitan && ./util/design/secded_gen.py --no_fpv --outdir ../../rtl/lowrisc_ecc
-
 bender:
 ifeq (,$(wildcard ./bender))
 	curl --proto '=https' --tlsv1.2 -sSf https://pulp-platform.github.io/bender/init \
@@ -128,3 +124,7 @@ gen_TCLS:
 	python $(REG_TOOL) $(HJSON_TCLS) -t $(TARGET_DIR_TCLS) -r
 	python $(REG_TOOL) $(HJSON_TCLS) -d > $(TARGET_DIR_TCLS)/doc.md
 	python $(REG_TOOL) $(HJSON_TCLS) -D > $(TARGET_DIR_TCLS)/TCLS.h
+
+gen_ECC:
+	$(BENDER) vendor init
+	cd rtl/deprecated/util/lowrisc_opentitan && ./util/design/secded_gen.py --no_fpv --outdir ../../lowrisc_ecc
diff --git a/rtl/ecc_concat_32_64.sv → rtl/deprecated/ecc_concat_32_64.sv b/rtl/ecc_concat_32_64.sv → rtl/deprecated/ecc_concat_32_64.sv
diff --git a/rtl/ecc_wrap/ecc_sram_wrap.sv → rtl/deprecated/ecc_sram_wrap.sv b/rtl/ecc_wrap/ecc_sram_wrap.sv → rtl/deprecated/ecc_sram_wrap.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_13_8_cor.sv → ...cated/lowrisc_ecc/prim_secded_13_8_cor.sv b/rtl/lowrisc_ecc/prim_secded_13_8_cor.sv → ...cated/lowrisc_ecc/prim_secded_13_8_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_13_8_dec.sv → ...cated/lowrisc_ecc/prim_secded_13_8_dec.sv b/rtl/lowrisc_ecc/prim_secded_13_8_dec.sv → ...cated/lowrisc_ecc/prim_secded_13_8_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_13_8_enc.sv → ...cated/lowrisc_ecc/prim_secded_13_8_enc.sv b/rtl/lowrisc_ecc/prim_secded_13_8_enc.sv → ...cated/lowrisc_ecc/prim_secded_13_8_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_22_16_cor.sv → ...ated/lowrisc_ecc/prim_secded_22_16_cor.sv b/rtl/lowrisc_ecc/prim_secded_22_16_cor.sv → ...ated/lowrisc_ecc/prim_secded_22_16_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_22_16_dec.sv → ...ated/lowrisc_ecc/prim_secded_22_16_dec.sv b/rtl/lowrisc_ecc/prim_secded_22_16_dec.sv → ...ated/lowrisc_ecc/prim_secded_22_16_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_22_16_enc.sv → ...ated/lowrisc_ecc/prim_secded_22_16_enc.sv b/rtl/lowrisc_ecc/prim_secded_22_16_enc.sv → ...ated/lowrisc_ecc/prim_secded_22_16_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_28_22_cor.sv → ...ated/lowrisc_ecc/prim_secded_28_22_cor.sv b/rtl/lowrisc_ecc/prim_secded_28_22_cor.sv → ...ated/lowrisc_ecc/prim_secded_28_22_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_28_22_dec.sv → ...ated/lowrisc_ecc/prim_secded_28_22_dec.sv b/rtl/lowrisc_ecc/prim_secded_28_22_dec.sv → ...ated/lowrisc_ecc/prim_secded_28_22_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_28_22_enc.sv → ...ated/lowrisc_ecc/prim_secded_28_22_enc.sv b/rtl/lowrisc_ecc/prim_secded_28_22_enc.sv → ...ated/lowrisc_ecc/prim_secded_28_22_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_39_32_cor.sv → ...ated/lowrisc_ecc/prim_secded_39_32_cor.sv b/rtl/lowrisc_ecc/prim_secded_39_32_cor.sv → ...ated/lowrisc_ecc/prim_secded_39_32_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_39_32_dec.sv → ...ated/lowrisc_ecc/prim_secded_39_32_dec.sv b/rtl/lowrisc_ecc/prim_secded_39_32_dec.sv → ...ated/lowrisc_ecc/prim_secded_39_32_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_39_32_enc.sv → ...ated/lowrisc_ecc/prim_secded_39_32_enc.sv b/rtl/lowrisc_ecc/prim_secded_39_32_enc.sv → ...ated/lowrisc_ecc/prim_secded_39_32_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_64_57_cor.sv → ...ated/lowrisc_ecc/prim_secded_64_57_cor.sv b/rtl/lowrisc_ecc/prim_secded_64_57_cor.sv → ...ated/lowrisc_ecc/prim_secded_64_57_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_64_57_dec.sv → ...ated/lowrisc_ecc/prim_secded_64_57_dec.sv b/rtl/lowrisc_ecc/prim_secded_64_57_dec.sv → ...ated/lowrisc_ecc/prim_secded_64_57_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_64_57_enc.sv → ...ated/lowrisc_ecc/prim_secded_64_57_enc.sv b/rtl/lowrisc_ecc/prim_secded_64_57_enc.sv → ...ated/lowrisc_ecc/prim_secded_64_57_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_72_64_cor.sv → ...ated/lowrisc_ecc/prim_secded_72_64_cor.sv b/rtl/lowrisc_ecc/prim_secded_72_64_cor.sv → ...ated/lowrisc_ecc/prim_secded_72_64_cor.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_72_64_dec.sv → ...ated/lowrisc_ecc/prim_secded_72_64_dec.sv b/rtl/lowrisc_ecc/prim_secded_72_64_dec.sv → ...ated/lowrisc_ecc/prim_secded_72_64_dec.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_72_64_enc.sv → ...ated/lowrisc_ecc/prim_secded_72_64_enc.sv b/rtl/lowrisc_ecc/prim_secded_72_64_enc.sv → ...ated/lowrisc_ecc/prim_secded_72_64_enc.sv
diff --git a/...risc_ecc/prim_secded_hamming_22_16_cor.sv → ...risc_ecc/prim_secded_hamming_22_16_cor.sv b/...risc_ecc/prim_secded_hamming_22_16_cor.sv → ...risc_ecc/prim_secded_hamming_22_16_cor.sv
diff --git a/...risc_ecc/prim_secded_hamming_22_16_dec.sv → ...risc_ecc/prim_secded_hamming_22_16_dec.sv b/...risc_ecc/prim_secded_hamming_22_16_dec.sv → ...risc_ecc/prim_secded_hamming_22_16_dec.sv
diff --git a/...risc_ecc/prim_secded_hamming_22_16_enc.sv → ...risc_ecc/prim_secded_hamming_22_16_enc.sv b/...risc_ecc/prim_secded_hamming_22_16_enc.sv → ...risc_ecc/prim_secded_hamming_22_16_enc.sv
diff --git a/...risc_ecc/prim_secded_hamming_39_32_cor.sv → ...risc_ecc/prim_secded_hamming_39_32_cor.sv b/...risc_ecc/prim_secded_hamming_39_32_cor.sv → ...risc_ecc/prim_secded_hamming_39_32_cor.sv
diff --git a/...risc_ecc/prim_secded_hamming_39_32_dec.sv → ...risc_ecc/prim_secded_hamming_39_32_dec.sv b/...risc_ecc/prim_secded_hamming_39_32_dec.sv → ...risc_ecc/prim_secded_hamming_39_32_dec.sv
diff --git a/...risc_ecc/prim_secded_hamming_39_32_enc.sv → ...risc_ecc/prim_secded_hamming_39_32_enc.sv b/...risc_ecc/prim_secded_hamming_39_32_enc.sv → ...risc_ecc/prim_secded_hamming_39_32_enc.sv
diff --git a/...risc_ecc/prim_secded_hamming_72_64_cor.sv → ...risc_ecc/prim_secded_hamming_72_64_cor.sv b/...risc_ecc/prim_secded_hamming_72_64_cor.sv → ...risc_ecc/prim_secded_hamming_72_64_cor.sv
diff --git a/...risc_ecc/prim_secded_hamming_72_64_dec.sv → ...risc_ecc/prim_secded_hamming_72_64_dec.sv b/...risc_ecc/prim_secded_hamming_72_64_dec.sv → ...risc_ecc/prim_secded_hamming_72_64_dec.sv
diff --git a/...risc_ecc/prim_secded_hamming_72_64_enc.sv → ...risc_ecc/prim_secded_hamming_72_64_enc.sv b/...risc_ecc/prim_secded_hamming_72_64_enc.sv → ...risc_ecc/prim_secded_hamming_72_64_enc.sv
diff --git a/rtl/lowrisc_ecc/prim_secded_pkg.sv → ...deprecated/lowrisc_ecc/prim_secded_pkg.sv b/rtl/lowrisc_ecc/prim_secded_pkg.sv → ...deprecated/lowrisc_ecc/prim_secded_pkg.sv
diff --git a/...entitan/util/design/data/secded_cfg.hjson → ...entitan/util/design/data/secded_cfg.hjson b/...entitan/util/design/data/secded_cfg.hjson → ...entitan/util/design/data/secded_cfg.hjson
diff --git a/...wrisc_opentitan/util/design/secded_gen.py → ...wrisc_opentitan/util/design/secded_gen.py b/...wrisc_opentitan/util/design/secded_gen.py → ...wrisc_opentitan/util/design/secded_gen.py
diff --git a/...ches/lowrisc_data_dir/0001-edit-cfg.patch → ...ches/lowrisc_data_dir/0001-edit-cfg.patch b/...ches/lowrisc_data_dir/0001-edit-cfg.patch → ...ches/lowrisc_data_dir/0001-edit-cfg.patch
diff --git a/...generation-script-and-update-testbe.patch → ...generation-script-and-update-testbe.patch b/...generation-script-and-update-testbe.patch → ...generation-script-and-update-testbe.patch
diff --git a/...oder-modules-to-prevent-circular-de.patch → ...oder-modules-to-prevent-circular-de.patch b/...oder-modules-to-prevent-circular-de.patch → ...oder-modules-to-prevent-circular-de.patch
diff --git a/...ive-algorithm-for-secded-Hsiao-matr.patch → ...ive-algorithm-for-secded-Hsiao-matr.patch b/...ive-algorithm-for-secded-Hsiao-matr.patch → ...ive-algorithm-for-secded-Hsiao-matr.patch