Implement RET instructions

maxfierke · Dec 20, 2023 · d6dd0b3 · d6dd0b3
1 parent a59e715
commit d6dd0b3
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Showing 2 changed files with 69 additions and 0 deletions.
diff --git a/cpu/cpu.go b/cpu/cpu.go
@@ -130,6 +130,9 @@ func (cpu *CPU) Execute(mmu *mem.MMU, inst *isa.Instruction) (nextPC uint16, cyc
 	case 0x87:
 		// ADD A, A
 		cpu.add8(cpu.Reg.A, cpu.Reg.A.Read())
+	case 0xC0:
+		// RET NZ
+		return cpu.ret(mmu, opcode, !cpu.Reg.F.Zero)
 	case 0xC1:
 		// POP BC
 		cpu.Reg.BC.Write(cpu.pop(mmu))
@@ -145,12 +148,21 @@ func (cpu *CPU) Execute(mmu *mem.MMU, inst *isa.Instruction) (nextPC uint16, cyc
 	case 0xC7:
 		// RST 00H
 		return cpu.rst(mmu, opcode, 0x00)
+	case 0xC8:
+		// RET Z
+		return cpu.ret(mmu, opcode, cpu.Reg.F.Zero)
+	case 0xC9:
+		// RET
+		return cpu.ret(mmu, opcode, true)
 	case 0xCA:
 		// JP Z, a16
 		return cpu.jump(mmu, opcode, cpu.Reg.F.Zero)
 	case 0xCF:
 		// RST 08H
 		return cpu.rst(mmu, opcode, 0x08)
+	case 0xD0:
+		// RET NC
+		return cpu.ret(mmu, opcode, !cpu.Reg.F.Carry)
 	case 0xD1:
 		// POP DE
 		cpu.Reg.DE.Write(cpu.pop(mmu))
@@ -163,6 +175,9 @@ func (cpu *CPU) Execute(mmu *mem.MMU, inst *isa.Instruction) (nextPC uint16, cyc
 	case 0xD7:
 		// RST 10H
 		return cpu.rst(mmu, opcode, 0x10)
+	case 0xD8:
+		// RET C
+		return cpu.ret(mmu, opcode, cpu.Reg.F.Carry)
 	case 0xDA:
 		// JP C, a16
 		return cpu.jump(mmu, opcode, cpu.Reg.F.Carry)
@@ -279,6 +294,14 @@ func (cpu *CPU) add16(reg RWTwoByte, value uint16) uint16 {
 	return newValue
 }
 
+func (cpu *CPU) ret(mmu *mem.MMU, opcode *isa.Opcode, should_jump bool) (nextPC uint16, cycles uint8) {
+	if should_jump {
+		return cpu.pop(mmu), uint8(opcode.Cycles[0])
+	} else {
+		return cpu.PC.Read() + uint16(opcode.Bytes), uint8(opcode.Cycles[1])
+	}
+}
+
 func (cpu *CPU) jump(mmu *mem.MMU, opcode *isa.Opcode, should_jump bool) (nextPC uint16, cycles uint8) {
 	if should_jump {
 		return mmu.Read16(cpu.PC.Read() + 1), uint8(opcode.Cycles[0])

diff --git a/cpu/cpu_test.go b/cpu/cpu_test.go
@@ -361,6 +361,52 @@ func TestExecutePushPop(t *testing.T) {
 	assertRegEquals(t, cpu.Reg.E.Read(), 0x89)
 }
 
+func TestExecuteRet(t *testing.T) {
+	cpu, _ := NewCPU()
+	ram := make([]byte, 0xFFFF)
+	mmu := mem.NewMMU(ram)
+
+	cpu.Reg.BC.Write(0x0489)
+	cpu.PC.Write(0x100)
+	cpu.SP.Write(0x10)
+
+	inst, _ := cpu.opcodes.InstructionFromByte(cpu.PC.Read(), 0xC5, false)
+	cpu.Execute(mmu, inst)
+
+	assertRegEquals(t, mmu.Read8(0xF), 0x4)
+	assertRegEquals(t, mmu.Read8(0xE), 0x89)
+	assertRegEquals(t, cpu.SP.Read(), 0xE)
+
+	inst, _ = cpu.opcodes.InstructionFromByte(cpu.PC.Read(), 0xC9, false)
+	nextPc, _ := cpu.Execute(mmu, inst)
+
+	assertNextPC(t, nextPc, 0x0489)
+}
+
+func TestExecuteRetFail(t *testing.T) {
+	cpu, _ := NewCPU()
+	ram := make([]byte, 0xFFFF)
+	mmu := mem.NewMMU(ram)
+
+	cpu.Reg.BC.Write(0x0489)
+	cpu.PC.Write(0x100)
+	cpu.SP.Write(0x10)
+
+	inst, _ := cpu.opcodes.InstructionFromByte(cpu.PC.Read(), 0xC5, false)
+	cpu.Execute(mmu, inst)
+
+	assertRegEquals(t, mmu.Read8(0xF), 0x4)
+	assertRegEquals(t, mmu.Read8(0xE), 0x89)
+	assertRegEquals(t, cpu.SP.Read(), 0xE)
+
+	cpu.Reg.F.Carry = true
+
+	inst, _ = cpu.opcodes.InstructionFromByte(cpu.PC.Read(), 0xD0, false)
+	nextPc, _ := cpu.Execute(mmu, inst)
+
+	assertNextPC(t, nextPc, 0x101)
+}
+
 func TestExecuteRst(t *testing.T) {
 	cpu, _ := NewCPU()
 	ram := make([]byte, 0xFFFF)