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SVA/LTL property instrumentation
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kroening committed Nov 7, 2024
1 parent bbe56b6 commit 3bcb3a7
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9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/FGp1.desc
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CORE
FGp1.smv
--buechi --bound 2
^\[.*\] F G p: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/FGp1.smv
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@@ -0,0 +1,9 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

-- should pass
LTLSPEC F G p
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Fp1.desc
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@@ -0,0 +1,9 @@
CORE
Fp1.smv
--buechi --bound 2
^\[.*\] F p: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Fp1.smv
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@@ -0,0 +1,9 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

-- should pass
LTLSPEC F p
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/GFp1.desc
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@@ -0,0 +1,9 @@
CORE
GFp1.smv
--buechi --bound 2
^\[.*\] G F p: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/GFp1.smv
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@@ -0,0 +1,9 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := !p;

-- should pass
LTLSPEC G F p
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Gp1.desc
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@@ -0,0 +1,9 @@
CORE
Gp1.smv
--buechi --bound 2
^\[.*\] G p: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Gp1.smv
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@@ -0,0 +1,9 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := TRUE;
next(p) := TRUE;

-- should pass
LTLSPEC G p
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Xp1.desc
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@@ -0,0 +1,9 @@
CORE
Xp1.smv
--buechi --bound 2
^\[.*\] X p: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/Xp1.smv
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@@ -0,0 +1,9 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

-- should pass
LTLSPEC X p
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/and1.desc
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@@ -0,0 +1,9 @@
CORE
and1.smv
--buechi --bound 2
^\[.*\] X p & X q: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
15 changes: 15 additions & 0 deletions regression/ebmc/Buechi/and1.smv
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@@ -0,0 +1,15 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

VAR q : boolean;

ASSIGN init(q) := FALSE;
next(q) := TRUE;

-- should pass
LTLSPEC X p & X q

9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/and2.desc
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@@ -0,0 +1,9 @@
CORE
and2.smv
--buechi --bound 2
^\[.*\] X \(p & q\): PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
15 changes: 15 additions & 0 deletions regression/ebmc/Buechi/and2.smv
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@@ -0,0 +1,15 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

VAR q : boolean;

ASSIGN init(q) := FALSE;
next(q) := TRUE;

-- should pass
LTLSPEC X (p & q)

9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/iff1.desc
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@@ -0,0 +1,9 @@
CORE
iff1.smv
--buechi --bound 2
^\[.*\] X p <-> X q: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/iff1.smv
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@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := TRUE;
next(p) := FALSE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X p <-> X q
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/iff2.desc
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
CORE
iff2.smv
--buechi --bound 2
^\[.*\] X \(p <-> q\): PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/iff2.smv
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := TRUE;
next(p) := FALSE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X (p <-> q)
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/implies1.desc
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@@ -0,0 +1,9 @@
CORE
implies1.smv
--buechi --bound 2
^\[.*\] X p -> X q: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/implies1.smv
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@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := TRUE;
next(p) := FALSE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X p -> X q
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/implies2.desc
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@@ -0,0 +1,9 @@
CORE
implies2.smv
--buechi --bound 2
^\[.*\] X \(p -> q\): PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/implies2.smv
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := TRUE;
next(p) := FALSE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X (p -> q)
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/or1.desc
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@@ -0,0 +1,9 @@
CORE
or1.smv
--buechi --bound 2
^\[.*\] X p \| X q: PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/or1.smv
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X p | X q
9 changes: 9 additions & 0 deletions regression/ebmc/Buechi/or2.desc
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@@ -0,0 +1,9 @@
CORE
or2.smv
--buechi --bound 2
^\[.*\] X \(p \| q\): PROVED up to bound 2$
^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
14 changes: 14 additions & 0 deletions regression/ebmc/Buechi/or2.smv
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
MODULE main

VAR p : boolean;

ASSIGN init(p) := FALSE;
next(p) := TRUE;

VAR q : boolean;

ASSIGN init(q) := TRUE;
next(q) := FALSE;

-- should pass
LTLSPEC X (p | q)
8 changes: 8 additions & 0 deletions src/ebmc/bmc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@ Author: Daniel Kroening, [email protected]
#include "bmc.h"

#include <solvers/prop/literal_expr.h>
#include <temporal-logic/ltl_to_buechi.h>
#include <trans-word-level/trans_trace_word_level.h>
#include <trans-word-level/unwind.h>

Expand All @@ -20,6 +21,7 @@ Author: Daniel Kroening, [email protected]
void bmc(
std::size_t bound,
bool convert_only,
bool buechi,
const transition_systemt &transition_system,
ebmc_propertiest &properties,
const ebmc_solver_factoryt &solver_factory,
Expand All @@ -46,6 +48,12 @@ void bmc(
if(property.is_disabled() || property.is_failure())
continue;

// LTL/SVA to Buechi?
if(buechi)
{
auto buechi = ltl_to_buechi(property.normalized_expr);
}

// Is it supported by the BMC engine?
if(!bmc_supports_property(property.normalized_expr))
{
Expand Down
1 change: 1 addition & 0 deletions src/ebmc/bmc.h
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ class transition_systemt;
void bmc(
std::size_t bound,
bool convert_only,
bool buechi,
const transition_systemt &,
ebmc_propertiest &,
const ebmc_solver_factoryt &,
Expand Down
2 changes: 1 addition & 1 deletion src/ebmc/ebmc_parse_options.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -241,7 +241,6 @@ int ebmc_parse_optionst::doit()
if(result != -1)
return result;

// possibly apply liveness-to-safety
if(cmdline.isset("liveness-to-safety"))
liveness_to_safety(ebmc_base.transition_system, ebmc_base.properties);

Expand Down Expand Up @@ -366,6 +365,7 @@ void ebmc_parse_optionst::help()
" {y--systemverilog} \t force SystemVerilog instead of Verilog\n"
" {y--reset} {uexpr} \t set up module reset\n"
" {y--liveness-to-safety} \t translate liveness properties to safety properties\n"
" {y--buechi} \t translate LTL/SVA properties to Buechi acceptance\n"
"\n"
"Methods:\n"
" {y--k-induction} \t do k-induction with k=bound\n"
Expand Down
2 changes: 1 addition & 1 deletion src/ebmc/ebmc_parse_options.h
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ class ebmc_parse_optionst:public parse_options_baset
"(compute-ct)(dot-netlist)(smv-netlist)(vcd):"
"(random-traces)(trace-steps):(random-seed):(traces):"
"(random-trace)(random-waveform)"
"(liveness-to-safety)"
"(liveness-to-safety)(buechi)"
"I:D:(preprocess)(systemverilog)(vl2smv-extensions)"
"(warn-implicit-nets)",
argc,
Expand Down
3 changes: 2 additions & 1 deletion src/ebmc/k_induction.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -202,7 +202,8 @@ void k_inductiont::induction_base()

bmc(
k,
false,
false, // convert_only
false, // buechi
transition_system,
properties,
solver_factory,
Expand Down
1 change: 1 addition & 0 deletions src/ebmc/property_checker.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,7 @@ property_checker_resultt word_level_bmc(
bmc(
bound,
convert_only,
cmdline.isset("buechi"),
transition_system,
properties,
solver_factory,
Expand Down
3 changes: 2 additions & 1 deletion src/temporal-logic/Makefile
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
SRC = nnf.cpp \
SRC = ltl_to_buechi.cpp \
nnf.cpp \
normalize_property.cpp \
temporal_logic.cpp \
trivial_sva.cpp \
Expand Down
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