formatter: README.md: Updated usage section

Signed-off-by: Jan Bylicki <[email protected]>
chipsalliance · May 23, 2023 · 8b72f45 · 8b72f45
1 parent a5216a1
commit 8b72f45
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/verilog/tools/formatter/README.md b/verilog/tools/formatter/README.md
@@ -32,6 +32,8 @@ To pipe from stdin, use '-' as <file>.
       operator.); default: 4;
 
   Flags from verilog/formatting/format_style_init.cc:
+    --always_wrap_module_instantiations (Always split module instantiation's
+      parameters and ports to new lines); default: false;
     --assignment_statement_alignment (Format various assignments:
       {align,flush-left,preserve,infer}); default: infer;
     --case_items_alignment (Format case items: