[RTL] Adams-bridge integration into caliptra_top (#600)

* Integrate abr into 2.0 * Remove swap files * Update with script * UPdate name * Revert reg files * Add keygen+sign flow * Fix typo * Remove unnecessary isr defs * Rerun rdl * Exclude mldsa exe from license header check * Update filelist * Add adamsbridge as a submodule * Fix typo * temp changes * Fix mldsa encoding * Update rdl and mldsa flows * Update filelist * Update submodule * Fix typo * undo comments * Try increasing timeout for gdb tests * Undo timeout change * Update submodule * Placeholder for mldsa rand tb * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/kupadhyayula/caliptra_synth_exp2' with updated timestamp and hash after successful run * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/kupadhyayula/caliptra_synth_exp2' with updated timestamp and hash after successful run * Clean up * Clean up rdl files * Add abr path * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/kupadhyayula/caliptra_synth_exp2' with updated timestamp and hash after successful run * Update path * Try removing pwd * Add submodule flag * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/kupadhyayula/caliptra_synth_exp2' with updated timestamp and hash after successful run --------- Co-authored-by: Kiran Upadhyayula <[email protected]>
chipsalliance · Oct 29, 2024 · c4915df · c4915df
1 parent 2717847
commit c4915df
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diff --git a/.github/scripts/license_header_check.sh b/.github/scripts/license_header_check.sh
@@ -78,7 +78,7 @@ exclude_dir='{uvmf*,.git,cmark,caliptra_reg_html,caliptra_top_reg_html,sha256,sh
 exclude_suffix='*.{tcl,txt,js,htm,html,json,vf,yml,woff,rsp,rdl,bashrc,waiver,cfg,hex,rc,exe,pdf,png,hvp,svg,log}'
 exclude_regs='*_reg*.{sv,rdl}'
 exclude_csr='*_csr*.*'
-exclude_file='{sglint_waivers,pr_hash,pr_timestamp,.git-comodules,.gitignore,spyglass_lint.policy,ascent.ctl,clp_mapfile,readme.md,README.md,SECURITY.md,c_sample.c}'
+exclude_file='{sglint_waivers,pr_hash,pr_timestamp,.git-comodules,.gitignore,.gitmodules,spyglass_lint.policy,ascent.ctl,clp_mapfile,readme.md,README.md,SECURITY.md,c_sample.c,test_dilithium5}'
 apache_patn='Licensed under the Apache License\|Apache License, Version 2\.0 (the \"License\")'
 
 # Recursive find through repository with some major exclusions

diff --git a/.github/workflow_metadata/pr_hash b/.github/workflow_metadata/pr_hash
@@ -1 +1 @@
-97174a8f4e139cd861cb3bbda2ce818e7d1dc2f237783d95448535e0204fde3de4d12e6dd81b16f56bd97711609540df
+4c8faff2f6d91d6196096aae143f7d81fc0b7dc5f38742cbe5398f2ecf7abd11327d51d29c1f95540503721dad790fd3
diff --git a/.github/workflow_metadata/pr_timestamp b/.github/workflow_metadata/pr_timestamp
@@ -1 +1 @@
-1728602320
+1730225605
diff --git a/.github/workflows/build-test-verilator.yml b/.github/workflows/build-test-verilator.yml
@@ -187,8 +187,9 @@ jobs:
       - name: Run Caliptra Verilator Smoke Test
         run: |
           CALIPTRA_ROOT=$(pwd)
+          ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd tools/scripts
-          make verilator CALIPTRA_ROOT=$CALIPTRA_ROOT TESTNAME=${{ matrix.test_name  }} | tee output.log
+          make verilator CALIPTRA_ROOT=$CALIPTRA_ROOT ADAMSBRIDGE_ROOT=$ADAMSBRIDGE_ROOT TESTNAME=${{ matrix.test_name  }} | tee output.log
           # Search the last 30 lines of the output for "TESTCASE PASSED"
           tail -n 30 output.log | grep "TESTCASE PASSED"
           # grep will return 0 if the search term is found, and 1 otherwise

diff --git a/.github/workflows/doc-gen.yml b/.github/workflows/doc-gen.yml
@@ -16,6 +16,8 @@ jobs:
 
     steps:
       - uses: actions/checkout@v3
+        with:
+          submodules: 'true'
 
       - name: Install peakrdl
         run: |
@@ -31,6 +33,7 @@ jobs:
 
       - name: Generate docs
         run: |
+          export ADAMSBRIDGE_ROOT=./submodules/adams-bridge
           echo Running script
           tools/scripts/reg_doc_gen.sh
 

diff --git a/.github/workflows/interactive-debugging.yml b/.github/workflows/interactive-debugging.yml
@@ -225,6 +225,7 @@ jobs:
       - name: Build Verilated simulation
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           mkdir run
           make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 \
             OBJCACHE="" CC=gcc CXX=g++ LINK=g++
@@ -233,20 +234,23 @@ jobs:
       - name: Test core register access
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd run
           ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \
             /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./dump_and_compare.sh'
 
       - name: Test memory access
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd run
           ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \
             /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./mem_access.sh'
 
       - name: Test peripheral access
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd run
           ${CALIPTRA_ROOT}/.github/scripts/gdb_test.sh \
             /bin/bash -c 'cd ${CALIPTRA_ROOT}/src/integration/test_suites/infinite_loop && ./peripheral_access.sh'
@@ -300,6 +304,7 @@ jobs:
       - name: Build Verilated simulation
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           mkdir run
           make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 FORCE_CPU_RESET=1 \
             OBJCACHE="" CC=gcc CXX=g++ LINK=g++
@@ -308,6 +313,7 @@ jobs:
       - name: Test peripheral access with core in reset
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd run
           ${CALIPTRA_ROOT}/.github/scripts/openocd_test.sh \
             -f board/caliptra-verilator-rst.cfg \
@@ -316,6 +322,7 @@ jobs:
       - name: Build Verilated simulation
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           rm -rf run/*
           make -C run -f ${CALIPTRA_ROOT}/tools/scripts/Makefile verilator-build TESTNAME=infinite_loop DEBUG_UNLOCKED=1 \
             OBJCACHE="" CC=gcc CXX=g++ LINK=g++
@@ -324,6 +331,7 @@ jobs:
       - name: Test JTAG access with clock gating
         run: |
           export CALIPTRA_ROOT=$(pwd)
+          export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
           cd run
           ${CALIPTRA_ROOT}/.github/scripts/openocd_test.sh \
             -f board/caliptra-verilator.cfg \

diff --git a/.github/workflows/pre-run-check.yml b/.github/workflows/pre-run-check.yml
@@ -201,4 +201,5 @@ jobs:
             TARGET_BR: ${{ (github.event_name == 'pull_request' && github.base_ref) || (github.event_name == 'workflow_dispatch' && inputs.base_ref) }}
         run: |
             export CALIPTRA_ROOT=$GITHUB_WORKSPACE
+            export ADAMSBRIDGE_ROOT=$CALIPTRA_ROOT/submodules/adams-bridge
             $GITHUB_WORKSPACE/.github/scripts/pr_rdl_check.sh "origin/$TARGET_BR"
diff --git a/.gitmodules b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "submodules/adams-bridge"]
+	path = submodules/adams-bridge
+	url = https://github.com/chipsalliance/adams-bridge
diff --git a/README.md b/README.md
@@ -141,6 +141,8 @@ caliptra-rtl
 |   |-- soc_ifc
 |   |-- spi_host
 |   `-- uart
+|-- submodules
+    |-- adams-bridge
 `-- tools
     |-- README
     |-- scripts

diff --git a/src/integration/asserts/caliptra_top_sva.sv b/src/integration/asserts/caliptra_top_sva.sv
@@ -48,6 +48,7 @@
 `define SHA512_MASKED_PATH  `CPTRA_TOP_PATH.ecc_top1.ecc_dsa_ctrl_i.ecc_hmac_drbg_interface_i.hmac_drbg_i.HMAC_K.u_sha512_core_h1
 `define SOC_IFC_TOP_PATH    `CPTRA_TOP_PATH.soc_ifc_top1
 `define WDT_PATH            `SOC_IFC_TOP_PATH.i_wdt
+`define MLDSA_PATH          `CPTRA_TOP_PATH.mldsa
 
 `define SVA_RDC_CLK `CPTRA_TOP_PATH.rdc_clk_cg
 `define CPTRA_FW_UPD_RST_WINDOW `SOC_IFC_TOP_PATH.i_soc_ifc_boot_fsm.fw_update_rst_window

diff --git a/src/integration/config/caliptra_top.vf b/src/integration/config/caliptra_top.vf
@@ -6,6 +6,13 @@
 +incdir+${CALIPTRA_ROOT}/src/soc_ifc/rtl
 +incdir+${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl
 +incdir+${CALIPTRA_ROOT}/src/doe/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/mldsa_sampler_top/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/norm_check/rtl
 +incdir+${CALIPTRA_ROOT}/src/axi/rtl
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim/rtl
 +incdir+${CALIPTRA_ROOT}/src/lc_ctrl/rtl
@@ -21,6 +28,20 @@
 +incdir+${CALIPTRA_ROOT}/src/hmac/rtl
 +incdir+${CALIPTRA_ROOT}/src/hmac_drbg/rtl
 +incdir+${CALIPTRA_ROOT}/src/ecc/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/rej_bounded/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/rej_sampler/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/exp_mask/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/abr_prim_generic/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/decompose/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sk_encode/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/makehint/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sig_encode_z/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sigdecode_h/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/sig_decode_z/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/pk_decode/rtl
++incdir+${ADAMSBRIDGE_ROOT}/src/power2round/rtl
 +incdir+${CALIPTRA_ROOT}/src/caliptra_prim_generic/rtl
 +incdir+${CALIPTRA_ROOT}/src/kmac/rtl
 +incdir+${CALIPTRA_ROOT}/src/edn/rtl
@@ -50,6 +71,44 @@ ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/el2_pdef.vh
 ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/include/el2_def.sv
 ${CALIPTRA_ROOT}/src/riscv_core/veer_el2/rtl/common_defines.sv
 ${CALIPTRA_ROOT}/src/doe/rtl/doe_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_config_defines.svh
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_params_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_reg_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_sva.svh
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_macros.svh
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_1r1w_ram.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_1r1w_be_ram.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_1r1w_512x4_ram.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_ram_regout.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_icg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_2ff_sync.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_piso_4.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_piso.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_sample_buffer.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_ahb_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_ahb_slv_sif.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_AND.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_full_adder.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_A2B_conv.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_N_bit_Boolean_adder.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_B2A_conv.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_masked_N_bit_mult.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_adder.sv
+${ADAMSBRIDGE_ROOT}/src/abr_libs/rtl/abr_add_sub_mod.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_sampler_top/rtl/mldsa_sampler_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl/sample_in_ball_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl/sib_mem.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_util_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_alert_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_subreg_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_mubi_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_cipher_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_sparse_fsm_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/tb/ntt_ram_tdp_file.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/tb/ntt_wrapper.sv
+${ADAMSBRIDGE_ROOT}/src/norm_check/rtl/norm_check_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_pkg.sv
 ${CALIPTRA_ROOT}/src/axi/rtl/axi_if.sv
 ${CALIPTRA_ROOT}/src/caliptra_prim/rtl/caliptra_prim_util_pkg.sv
@@ -194,6 +253,106 @@ ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_pe_final.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_mult_dsp.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_add_sub_mod_alter.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_adder.sv
+${ADAMSBRIDGE_ROOT}/src/rej_bounded/rtl/rej_bounded_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/rej_bounded/rtl/rej_bounded2.sv
+${ADAMSBRIDGE_ROOT}/src/rej_sampler/rtl/rej_sampler_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/rej_sampler/rtl/rej_sampler.sv
+${ADAMSBRIDGE_ROOT}/src/exp_mask/rtl/exp_mask_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/exp_mask/rtl/exp_mask.sv
+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl/sample_in_ball_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl/sample_in_ball_shuffler.sv
+${ADAMSBRIDGE_ROOT}/src/sample_in_ball/rtl/sample_in_ball.sv
+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl/abr_sha3_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim_generic/rtl/abr_prim_generic_flop_en.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim_generic/rtl/abr_prim_generic_flop.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim_generic/rtl/abr_prim_generic_buf.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_flop_en.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_cdc_rand_delay.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_flop_2sync.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_lfsr.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_mubi4_sync.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_diff_decode.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_sec_anchor_buf.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_slicer.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_count.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_sparse_fsm_flop.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_dom_and_2share.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_sec_anchor_flop.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_reg_we_check.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_packer_fifo.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_max_tree.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_subreg_arb.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_subreg.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_intr_hw.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_onehot_check.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_mubi8_sync.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_fifo_sync_cnt.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_buf.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_alert_receiver.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_flop.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_alert_sender.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_fifo_sync.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_arbiter_ppc.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_sum_tree.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_subreg_ext.sv
+${ADAMSBRIDGE_ROOT}/src/abr_prim/rtl/abr_prim_edge_detector.sv
+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl/abr_keccak_round.sv
+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl/abr_keccak_2share.sv
+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl/abr_sha3pad.sv
+${ADAMSBRIDGE_ROOT}/src/abr_sha3/rtl/abr_sha3.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_sampler_top/rtl/mldsa_sampler_top.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_butterfly2x2.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_butterfly.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_mult_dsp.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_mult_reduction.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_special_adder.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_div2.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_buffer.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_twiddle_lookup.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/ntt_top/rtl/ntt_top.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_r1_lut.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_w1_mem.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_mod_2gamma2.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_w1_encode.sv
+${ADAMSBRIDGE_ROOT}/src/decompose/rtl/decompose_usehint.sv
+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl/skdecode_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sk_encode/rtl/skencode.sv
+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl/skdecode_top.sv
+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl/skdecode_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl/skdecode_s1s2_unpack.sv
+${ADAMSBRIDGE_ROOT}/src/sk_decode/rtl/skdecode_t0_unpack.sv
+${ADAMSBRIDGE_ROOT}/src/makehint/rtl/makehint_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/makehint/rtl/hintgen.sv
+${ADAMSBRIDGE_ROOT}/src/makehint/rtl/makehint.sv
+${ADAMSBRIDGE_ROOT}/src/makehint/rtl/makehint_sample_buffer.sv
+${ADAMSBRIDGE_ROOT}/src/norm_check/rtl/norm_check.sv
+${ADAMSBRIDGE_ROOT}/src/norm_check/rtl/norm_check_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/norm_check/rtl/norm_check_top.sv
+${ADAMSBRIDGE_ROOT}/src/sig_encode_z/rtl/sigencode_z_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sig_encode_z/rtl/sigencode_z_top.sv
+${ADAMSBRIDGE_ROOT}/src/sig_encode_z/rtl/sigencode_z_unit.sv
+${ADAMSBRIDGE_ROOT}/src/sigdecode_h/rtl/sigdecode_h_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sigdecode_h/rtl/sigdecode_h.sv
+${ADAMSBRIDGE_ROOT}/src/sigdecode_h/rtl/sigdecode_h_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/sig_decode_z/rtl/sigdecode_z_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/sig_decode_z/rtl/sigdecode_z_top.sv
+${ADAMSBRIDGE_ROOT}/src/sig_decode_z/rtl/sigdecode_z_unit.sv
+${ADAMSBRIDGE_ROOT}/src/pk_decode/rtl/pkdecode.sv
+${ADAMSBRIDGE_ROOT}/src/power2round/rtl/power2round_defines_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/power2round/rtl/power2round_top.sv
+${ADAMSBRIDGE_ROOT}/src/power2round/rtl/power2round_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/power2round/rtl/power2round_core.sv
+${ADAMSBRIDGE_ROOT}/src/power2round/rtl/power2round_skencode.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_ctrl_pkg.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_seq_prim.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_seq_sec.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_ctrl.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_top.sv
+${ADAMSBRIDGE_ROOT}/src/mldsa_top/rtl/mldsa_reg.sv
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv_reg.sv
 ${CALIPTRA_ROOT}/src/datavault/rtl/dv.sv