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fix(DataStorage): MCP2 requires that all input signal must hold for 2 cycles
CI #601: Pull request #240 synchronize by Ivyfeather
September 18, 2024 09:45 46m 56s mcp2-fix-hold
September 18, 2024 09:45 46m 56s
fix(DataStorage): MCP2 requires that all input signal must hold for 2 cycles
CI #600: Pull request #240 synchronize by Ivyfeather
September 18, 2024 08:51 46m 55s mcp2-fix-hold
September 18, 2024 08:51 46m 55s
fix(DataStorage): MCP2 requires that all input signal must hold for 2 cycles
CI #599: Pull request #240 synchronize by Ivyfeather
September 18, 2024 06:57 33m 51s mcp2-fix-hold
September 18, 2024 06:57 33m 51s
feat(Common, MSHR): set TXREQ with the highest priority (#242)
CI #598: Commit b4bb9d3 pushed by linjuanZ
September 18, 2024 05:13 49m 16s master
September 18, 2024 05:13 49m 16s
chore(MSHR): raise timeout assertion threshold (#241)
CI #597: Commit 2b6afb5 pushed by linjuanZ
September 18, 2024 05:13 45m 50s master
September 18, 2024 05:13 45m 50s
fix(DataStorage): MCP2 requires that all input signal must hold for 2 cycles
CI #596: Pull request #240 synchronize by Ivyfeather
September 18, 2024 03:34 8m 39s mcp2-fix-hold
September 18, 2024 03:34 8m 39s
feat(Common, MSHR): set TXREQ with the highest priority
CI #595: Pull request #242 opened by linjuanZ
September 18, 2024 03:27 46m 3s feat-qos
September 18, 2024 03:27 46m 3s
chore(MSHR): raise timeout assertion threshold
CI #594: Pull request #241 opened by linjuanZ
September 16, 2024 02:24 45m 36s chore-mshr-timeout
September 16, 2024 02:24 45m 36s
fix(TL2CHICoupledL2): denial of access must assert corrupt (#239)
CI #592: Commit 4ded089 pushed by linjuanZ
September 12, 2024 08:55 45m 52s master
September 12, 2024 08:55 45m 52s
fix(TL2CHICoupledL2): denial of access must assert corrupt
CI #591: Pull request #239 synchronize by linjuanZ
September 12, 2024 07:58 45m 32s fix-nderr
September 12, 2024 07:58 45m 32s
fix(TL2CHICoupledL2): denial of access must assert corrupt
CI #590: Pull request #239 opened by linjuanZ
September 12, 2024 07:38 9m 7s fix-nderr
September 12, 2024 07:38 9m 7s
timing(MMIOBridge, TL2CHICoupledL2): optimize PCredit timing (#236)
CI #588: Commit 084df8f pushed by linjuanZ
September 11, 2024 09:16 47m 4s master
September 11, 2024 09:16 47m 4s
RequestBuffer: remove duplicate prefetch with MainPipe
CI #587: Pull request #238 opened by Zephyrols
September 11, 2024 06:54 29m 53s Zephyrols:rm_dup_with_mp
September 11, 2024 06:54 29m 53s
chore(LinkLayer, TL2CHICoupledL2): add debug info for PCredit
CI #586: Pull request #237 synchronize by linjuanZ
September 11, 2024 05:45 47m 14s debug-pcrd
September 11, 2024 05:45 47m 14s
timing(MMIOBridge, TL2CHICoupledL2): optimize PCredit timing
CI #585: Pull request #236 synchronize by linjuanZ
September 11, 2024 05:04 45m 50s timing-pcrd
September 11, 2024 05:04 45m 50s
chore(LinkLayer, TL2CHICoupledL2): add debug info for PCredit
CI #584: Pull request #237 synchronize by linjuanZ
September 10, 2024 02:27 46m 57s debug-pcrd
September 10, 2024 02:27 46m 57s
chore(LinkLayer, TL2CHICoupledL2): add debug info for PCredit
CI #583: Pull request #237 opened by linjuanZ
September 9, 2024 13:36 51m 3s debug-pcrd
September 9, 2024 13:36 51m 3s
timing(MMIOBridge, TL2CHICoupledL2): optimize PCredit timing
CI #582: Pull request #236 synchronize by linjuanZ
September 9, 2024 13:11 47m 29s timing-pcrd
September 9, 2024 13:11 47m 29s
timing(MMIOBridge, TL2CHICoupledL2): optimize PCredit timing
CI #581: Pull request #236 synchronize by linjuanZ
September 9, 2024 10:16 46m 21s timing-pcrd
September 9, 2024 10:16 46m 21s
timing(MMIOBridge, TL2CHICoupledL2): optimize PCredit timing
CI #580: Pull request #236 opened by linjuanZ
September 8, 2024 12:55 46m 24s timing-pcrd
September 8, 2024 12:55 46m 24s
September 7, 2024 08:22 45m 29s
TL2CHICoupledL2: manage PCredits among MMIO and cacheable together
CI #577: Pull request #235 synchronize by linjuanZ
September 6, 2024 14:13 46m 29s debug-pldm-naive-pcrd
September 6, 2024 14:13 46m 29s