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TL2CHICoupledL2: manage PCredits among MMIO and cacheable together CI #575: Pull request #235 opened by linjuanZ
September 6, 2024 13:37 48m 6s debug-pldm-naive-pcrd
debug-pldm-naive-pcrd
September 6, 2024 13:37 48m 6s
fix(TP): fix XS compiling bug in TPmetaReq/Resp ; submodule(HuanCun):… CI #574: Commit 11dbe70 pushed by Ma-YX
September 5, 2024 09:16 45m 40s master
master
September 5, 2024 09:16 45m 40s
fix(TP): fix XS compiling bug in TPmetaReq/Resp ; submodule(HuanCun): bump HuanCun CI #573: Pull request #234 opened by Ma-YX
September 5, 2024 08:13 44m 55s tp-hardcoding-tmp
tp-hardcoding-tmp
September 5, 2024 08:13 44m 55s
revert Queue_SRAM to Queue CI #572: Commit a748d92 pushed by linjuanZ
September 4, 2024 12:06 52m 42s master
master
September 4, 2024 12:06 52m 42s
Misc: Split tagArray SRAM & Revert Queue_SRAM CI #571: Pull request #233 opened by cailuoshan
September 4, 2024 08:00 46m 48s 20240904-split-tagsram
20240904-split-tagsram
September 4, 2024 08:00 46m 48s
fix(TP): fix hardcoding issues in TP to support sv48 CI #570: Commit aa9d73c pushed by Ma-YX
September 3, 2024 11:13 46m 36s master
master
September 3, 2024 11:13 46m 36s
fix(TP): fix hardcoding issues in TP to support sv48 CI #569: Pull request #232 opened by Ma-YX
September 3, 2024 08:45 49m 57s tp-hardcoding-tmp
tp-hardcoding-tmp
September 3, 2024 08:45 49m 57s
AsyncBridge: drive RXLINKACTIVEACK HIGH only after reset is finished CI #568: Commit 635b2d6 pushed by linjuanZ
August 31, 2024 08:42 45m 48s master
master
August 31, 2024 08:42 45m 48s
LinkLayer: During reset RXLINKACTIVEACK must be deasserted CI #567: Pull request #231 synchronize by linjuanZ
August 30, 2024 02:03 46m 1s fix-rxlinkactiveack
fix-rxlinkactiveack
August 30, 2024 02:03 46m 1s
LinkLayer: During reset RXLINKACTIVEACK must be deasserted CI #566: Pull request #231 opened by linjuanZ
August 29, 2024 03:30 46m 41s fix-rxlinkactiveack
fix-rxlinkactiveack
August 29, 2024 03:30 46m 41s
cmo: remove RVA23 prefix (#230) CI #565: Commit 41f2152 pushed by happy-lx
August 28, 2024 01:45 44m 56s master
master
August 28, 2024 01:45 44m 56s
cmo: remove RVA23 prefix CI #564: Pull request #230 opened by happy-lx
August 27, 2024 09:59 46m 14s rva23_cmo_fix
rva23_cmo_fix
August 27, 2024 09:59 46m 14s
misc: Split Data SRAM in Chisel (#229) CI #563: Commit b4ce9c2 pushed by Ivyfeather
August 26, 2024 07:26 46m 8s master
master
August 26, 2024 07:26 46m 8s
feat: use dual-port SRAM in Queue for large queues `(TXDAT/GrantBuffe… CI #562: Commit de01f28 pushed by Ivyfeather
August 26, 2024 07:25 47m 42s master
master
August 26, 2024 07:25 47m 42s
misc: Split Data SRAM in Chisel CI #561: Pull request #229 opened by Ivyfeather
August 26, 2024 06:38 46m 28s data-sram-split
data-sram-split
August 26, 2024 06:38 46m 28s
LinkLayer: ignore flitpend to fix synchronize issue CI #560: Commit 7770ae2 pushed by linjuanZ
August 26, 2024 06:35 44m 12s master
master
August 26, 2024 06:35 44m 12s
RVA23 CMO: support RVA23 Zicbom & Zicboz (#225) CI #559: Commit 3ac69da pushed by Ivyfeather
August 26, 2024 06:13 45m 50s master
master
August 26, 2024 06:13 45m 50s
feat: use dual-port SRAM in Queue for large queues (TXDAT/GrantBuffer/SourceC) CI #558: Pull request #228 opened by Ivyfeather
August 26, 2024 03:35 45m 0s dev-queue-sram
dev-queue-sram
August 26, 2024 03:35 45m 0s
RVA23 CMO: support RVA23 Zicbom & Zicboz CI #557: Pull request #225 synchronize by Ivyfeather
August 26, 2024 03:17 45m 59s rva23_cmo
rva23_cmo
August 26, 2024 03:17 45m 59s
AsyncBridge: set tx/rxlinkactivereq HIGH only when bridge is ready CI #556: Pull request #227 synchronize by yulightenyu
August 26, 2024 03:06 44m 16s fix-async-bridge
fix-async-bridge
August 26, 2024 03:06 44m 16s
TL2CHICoupledL2, MSHR: fix RXRSP timing path (#219) CI #555: Commit e0eec93 pushed by linjuanZ
August 22, 2024 05:37 44m 51s master
master
August 22, 2024 05:37 44m 51s
ReqArb: fix bug for MSHR back pressure control from SourceC/TX channe… CI #554: Commit dc8b144 pushed by linjuanZ
August 22, 2024 05:08 44m 58s master
master
August 22, 2024 05:08 44m 58s
RVA23 CMO: support RVA23 Zicbom & Zicboz CI #553: Pull request #225 synchronize by cailuoshan
August 22, 2024 03:38 44m 45s rva23_cmo
rva23_cmo
August 22, 2024 03:38 44m 45s
ReqArb: fix bug for MSHR back pressure control from SourceC/TX channel CI #552: Pull request #226 synchronize by cailuoshan
August 21, 2024 13:34 45m 29s fix-reqarb
fix-reqarb
August 21, 2024 13:34 45m 29s
AsyncBridge: set tx/rxlinkactivereq HIGH only when bridge is ready CI #551: Pull request #227 opened by linjuanZ
August 21, 2024 13:01 46m 35s fix-async-bridge
fix-async-bridge
August 21, 2024 13:01 46m 35s