Skip to content

Commit

Permalink
mcux: scripts: pinctrl: update script to change RT 3 digital pinctrl …
Browse files Browse the repository at this point in the history
…model

Change RT 3 digital platforms pinctrl model as below:
index+offset+mux combined as a uint32_t

Regenerate pinctrl header files for RT500/600

Signed-off-by: Lucien Zhao <[email protected]>
  • Loading branch information
lucien-nxp committed Nov 15, 2024
1 parent 3c64cd6 commit 9dbb596
Show file tree
Hide file tree
Showing 7 changed files with 26,858 additions and 26,796 deletions.
9,779 changes: 4,893 additions & 4,886 deletions dts/nxp/nxp_imx/rt/MIMXRT595SFAWC-pinctrl.h

Large diffs are not rendered by default.

11,753 changes: 5,881 additions & 5,872 deletions dts/nxp/nxp_imx/rt/MIMXRT595SFFOC-pinctrl.h

Large diffs are not rendered by default.

8,555 changes: 4,278 additions & 4,277 deletions dts/nxp/nxp_imx/rt/MIMXRT685SFAWBR-pinctrl.h

Large diffs are not rendered by default.

11,933 changes: 5,967 additions & 5,966 deletions dts/nxp/nxp_imx/rt/MIMXRT685SFFOB-pinctrl.h

Large diffs are not rendered by default.

11,555 changes: 5,778 additions & 5,777 deletions dts/nxp/nxp_imx/rt/MIMXRT685SFVKB-pinctrl.h

Large diffs are not rendered by default.

5 changes: 4 additions & 1 deletion mcux/scripts/pinctrl/gen_soc_headers.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#!/usr/bin/env python3
#
# Copyright 2023, NXP
# Copyright 2023,2024 NXP
#
# SPDX-License-Identifier: Apache-2.0

Expand Down Expand Up @@ -63,6 +63,9 @@ def processor_to_controller(processor_name):
if "IMXRT1" in processor_name:
# Use IMX config tools
return 'IOMUX'
if "IMXRT7" in processor_name:
# LPC config tools
return 'IOCON'
if "IMXRT6" in processor_name:
# LPC config tools
return 'IOCON'
Expand Down
74 changes: 57 additions & 17 deletions mcux/scripts/pinctrl/lpc/lpc_cfg_utils.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#!/usr/bin/env python3
#
# Copyright (c) 2022, NXP
# Copyright (c) 2022,2024 NXP
#
# SPDX-License-Identifier: Apache-2.0

Expand All @@ -23,7 +23,7 @@ class MUXOption:
"""
Internal class representing a mux option on the SOC
"""
def __init__(self, connection, imx_rt = False):
def __init__(self, connection, imx_rt = ''):
"""
Initializes a mux option
@param connection XML connection option from signal_configuration.xml
Expand All @@ -35,12 +35,18 @@ def __init__(self, connection, imx_rt = False):
return
# Get MUX settings
self._offset = -1
# Get default instance index
self._index = 0
for periph in connection.iter('peripheral_signal_ref'):
self._periph = periph.attrib.get('peripheral')
self._signal = periph.attrib.get('signal')
self._channel = periph.attrib.get('channel')
self._mux_overrides = {}
if imx_rt:
if imx_rt == 'MIMXRT7XX':
# RT 7xx series has different function register and instance number
func_name = 'FSEL'
pio_regex = re.compile(r'IOPCTL(\d+)_PIO(\d+)_(\d+)')
elif imx_rt == 'MIMXRT5/6XX':
# RT 6xx/5xx series has different function register
func_name = 'FSEL'
pio_regex = re.compile(r'IOPCTL_PIO(\d+)_(\d+)')
Expand All @@ -60,11 +66,23 @@ def __init__(self, connection, imx_rt = False):
# {Peripheral}_{Signal}{Channel}_{Pin}
self._name = f"{self._periph}_{self._signal}{self._channel}"
# Append name of pin
self._name += f"_PIO{match.group(1)}_{match.group(2)}"
port = int(match.group(1))
pin = int(match.group(2))
if imx_rt == 'MIMXRT7XX':
self._name += f"_PIO{match.group(2)}_{match.group(3)}"
self._index = int(match.group(1))
port = int(match.group(2))
pin = int(match.group(3))
if port < 4:
self._offset = (port * 32) + pin
elif port < 8:
self._offset = ((port - 4) * 32) + pin
else:
self._offset = ((port - 8) * 32) + pin
else:
self._name += f"_PIO{match.group(1)}_{match.group(2)}"
port = int(match.group(1))
pin = int(match.group(2))
self._offset = (port * 32) + pin
self._mux = int(val, 16)
self._offset = (port * 32) + pin
elif match and field == 'MODE':
# MUX overrides pullup/pulldown mode
if val == '0':
Expand Down Expand Up @@ -95,13 +113,21 @@ def __init__(self, connection, imx_rt = False):
if val == '0x1':
self._mux_overrides['amena'] = 'enabled'

if self._name == 'PMIC_I2C_SCL' and imx_rt:
if self._name == 'PMIC_I2C_SCL' and imx_rt == "MIMXRT5/6XX":
# RT600/500 have special pmic I2C pins
self._offset = 0x100
self._mux = 0
elif self._name == 'PMIC_I2C_SDA' and imx_rt:
elif self._name == 'PMIC_I2C_SDA' and imx_rt == "MIMXRT5/6XX":
self._offset = 0x101
self._mux = 0
elif self._name == 'PMIC_I2C_SCL' and imx_rt == "MIMXRT7XX":
self._index = 1
self._offset = 0x96
self._mux = 0
elif self._name == 'PMIC_I2C_SDA' and imx_rt == "MIMXRT7XX":
self._index = 1
self._offset = 0x97
self._mux = 0
if re.match(r'^\d', self._name):
# If string starts with a digit, it will not be a valid C name
self._name = f"PIN_{self._name}"
Expand Down Expand Up @@ -160,6 +186,12 @@ def get_pin(self):
"""
return self._pin

def get_index(self):
"""
Get mux instance index
"""
return self._index

def get_mux(self):
"""
Get mux register write value
Expand Down Expand Up @@ -204,7 +236,7 @@ class SignalPin:
"""
Internal class representing a signal on the SOC
"""
def __init__(self, pin, imx_rt = False):
def __init__(self, pin, imx_rt = ''):
"""
Initializes a SignalPin object
@param pin: pin XML object from signal_configuration.xml
Expand Down Expand Up @@ -353,7 +385,7 @@ class PinGroup:
"""
Internal class representing pin group
"""
def __init__(self, function, signal_map, imx_rt = False):
def __init__(self, function, signal_map, imx_rt = ''):
"""
Creates a pin group
@param function: function xml structure from MEX configuration file
Expand Down Expand Up @@ -606,11 +638,14 @@ def _parse_signal_xml(self, signal_fn):
signal_root = signal_tree.getroot()

self._part_num = signal_root.find("./part_information/part_number").get('id')
if 'MIMXRT' in self._part_num:
if 'MIMXRT7' in self._part_num:
# IMX RT600/500 series part. Different register layout and pin names
self._imx_rt = 'MIMXRT7XX'
elif 'MIMXRT' in self._part_num:
# IMX RT600/500 series part. Different register layout and pin names
self._imx_rt = True
self._imx_rt = 'MIMXRT5/6XX'
else:
self._imx_rt = False
self._imx_rt = ''

logging.info("Loaded XML for %s", self._part_num)

Expand Down Expand Up @@ -644,6 +679,9 @@ def write_pinctrl_defs(self, outputfile):

if self._imx_rt:
# Notes on the below macro:
# Due to IOPCTL instance number is nonunique, index variable is
# introduced to represent the label of IOPCTL instance. We use
# 4 bits to store index value.
# We store the pin and port values as an offset, because some pins
# do not follow a consistent offset. We use 12 bits to store this
# offset.
Expand All @@ -652,8 +690,9 @@ def write_pinctrl_defs(self, outputfile):
# don't conflict with pin configuration settings
# Store the mux value at the offset it will actually be written to the
# configuration register
mux_macro = ("#define IOPCTL_MUX(offset, mux)\t\t\\\n"
"\t((((offset) & 0xFFF) << 20) |\t\t\\\n"
mux_macro = ("#define IOPCTL_MUX(index, offset, mux)\t\t\\\n"
"\t((((index) & 0xF) << 16) |\t\t\\\n"
"\t(((offset) & 0xFFF) << 20) |\t\t\\\n"
"\t(((mux) & 0xF) << 0))\n\n")
else:
# Notes on the below macro:
Expand Down Expand Up @@ -695,11 +734,12 @@ def write_pinctrl_defs(self, outputfile):
sig_port = pin.get_port()
sig_pin = pin.get_pin()
for mux in sorted(pin.get_mux_options()):
index = mux.get_index()
offset = mux.get_offset()
label = mux.get_name()
mux = mux.get_mux()
if self._imx_rt:
file.write(f"#define {label} IOPCTL_MUX({offset}, {mux}) "
file.write(f"#define {label} IOPCTL_MUX({index}, {offset}, {mux}) "
f"/* PIO{sig_port}_{sig_pin} */\n")
else:
file.write(f"#define {label} IOCON_MUX({offset}, {pin_type}, {mux}) "
Expand Down

0 comments on commit 9dbb596

Please sign in to comment.