[QuickStart] Yosys/Parmys Update #2776
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Thanks @ZohairZaidi !
I have some comments about the parmys flow (I think we've listed some unnecessary steps for it) that you should take a look at closely. Adding @amirarjmand93 and @KennethKent to review; in case @AlexandreSinger has time to review I've tagged him too
doc/src/quickstart/index.rst
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| Hierarchy reader converted 6 instances of blackboxes. | ||
| The network was strashed and balanced before FPGA mapping. | ||
| Hierarchy writer reintroduced 6 instances of blackboxes. | ||
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| If we now inspect the produced BLIF file (``blink.abc_no_clock.blif``) we see that ABC was able to significantly simplify and optimize the circuit's logic (compared to ``blink.odin.blif``): | ||
| If we now inspect the produced BLIF file (``blink.abc_no_clock.blif``) we see that ABC was able to significantly simplify and optimize the circuit's logic (compared to ``blink.parmys.blif``): |
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Take a look at the two files and see if this is true. Are the number of .names significantly different? Confirm they are different a bit at least. We shouldn't say it is significantly simpler / optimized unless it is.
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just double checked and that seems to be an error on my part as the number of .names are the same. Thanks for catching that.
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Thanks. I think we should just simplify then to show running parmys in this section, without abc or the clock relabelling (we can leave those in the Odin-II section). If you can confirm the clock relabeling is not called for the parmys flow in run_vtr_flow that would be ideal -- then we can confidently remove it from this section.
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sure thing. It does not appear to be called in run_vtr_flow.
My initial confusion stemmed from reading the Parmys paper, which states, "the Parmys pass is called to perform partial mapping according to the target architecture, and then a series of optimization and logic mappings are performed to convert all the remaining Yosys internal types to primitives. Next, the output is passed to ABC and VPR stages."
This led me to believe that running only the Parmys part of the flow would require a separate invocation of ABC since we are executing the command with both -start parmys and -end parmys, it explicitly skips the ABC.
I will update the PR and also wait for final confirmation by the added members
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Thanks @vaughnbetz!, I have addressed your suggestions. Will wait for the added members to review as well. |
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@ZohairZaidi Thank you for these changes! I like how you are running Yosys. I think using the vtr_flow script just on the Yosys step is perfectly fine since running Yosys directly is such a pain. The main goal is to know how to make the .blif file.
I have left some comments below, but overall the documentation is very good.
| @@ -440,16 +346,16 @@ which should produce output similar to:: | |||
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| EArch/blink OK (took 0.26 seconds) | |||
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| There are also multiple log files (including for ABC, ODIN and VPR), which by convention the script names with the ``.out`` suffix: | |||
| There are also multiple log files (including for ABC, Parmys and VPR), which by convention the script names with the ``.out`` suffix: | |||
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Same comment as above, is ABC log files still generated?
| @@ -462,10 +368,10 @@ You will also see there are several BLIF files produced: | |||
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| > ls *.blif | |||
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| 0_blink.abc.blif 0_blink.raw.abc.blif blink.odin.blif | |||
| 0_blink.odin.blif blink.abc.blif blink.pre-vpr.blif | |||
| 0_blink.abc.blif 0_blink.raw.abc.blif blink.parmys.blif | |||
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Are these abc blif files still there?
| @@ -370,7 +276,7 @@ The resulting command is: | |||
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| > $VTR_ROOT/vpr/vpr \ | |||
| $VTR_ROOT/vtr_flow/arch/timing/EArch.xml \ | |||
| blink --circuit_file blink.pre-vpr.blif \ | |||
| ~/vtr_work/quickstart/blink_manual/temp/blink.parmys.blif \ | |||
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Why are you passing the full file path? If someone is following your steps correctly, should they not already be in the ~/vtr_work/quickstart/blink_manual/ folder? If you do want to make it explicit, I would recommend creating a $WRK_DIR variable, similar to $VTR_ROOT instead of passing the whole path.
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| We can then view the implementation as usual by appending ``--analysis --disp on`` to the command: | ||
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| .. code-block:: bash | ||
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| > $VTR_ROOT/vpr/vpr \ | ||
| $VTR_ROOT/vtr_flow/arch/timing/EArch.xml \ | ||
| blink --circuit_file blink.pre-vpr.blif \ | ||
| ~/vtr_work/quickstart/blink_manual/temp/blink.parmys.blif \ |
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Same path comment as above.
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| .. code-block:: bash | ||
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| > make CMAKE_PARAMS="-DWITH_ODIN=on" |
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This is confusing since the line above tells the user to change directory to ~/vtr_work/quickstart/blink_manual and now you are saying to use the make command. This should be in the VTR directory. I would move the build instructions above the prior code block and provide the cd command to go to the correct directory.
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Adding @soheilshahrouz in case he can help figure out the required flow ... we need to document this well in the quickstart as Mohamed and I were confused about it. |
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I agree @vaughnbetz, I plan to work on it this reading week. Please let me know what you were confused about. |
Description
This pull request updates the VTR Quick Start Guide by replacing Odin II as the primary synthesis tool with the Yosys/Parmys flow. I have also updated the graphic images
Related Issue
closes #2739
Checklist: