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avalon-mm

Here are 2 public repositories matching this topic...

panda5mt / KyogenRV

The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.

fpga intel chisel riscv chisel3 altera risc-v rv32i avalon-mm

Updated Apr 11, 2021
Scala

AhmedERady / Grad_Project

Smart Automation Controller for Precision Agriculture

python fpga tensorflow vhdl matrix-multiplication research-project peripherals convolutional-neural-networks fpga-soc-linux fpga-soc tensorflow-examples fpga-accelerator mobilenet depthwiseconv2d tensorflow-lite depthwise-separable-convolutions fpga-programming depthwise-convolutions avalon-mm

Updated May 7, 2022
V

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