Skip to content

Commit

Permalink
test: extract getSlot and unit test it
Browse files Browse the repository at this point in the history
  • Loading branch information
agparadiso committed Jan 10, 2025
1 parent 39744e3 commit 74e909c
Show file tree
Hide file tree
Showing 2 changed files with 42 additions and 2 deletions.
19 changes: 17 additions & 2 deletions pkg/workflows/wasm/host/wasip1.go
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@ package host

import (
"encoding/binary"
"fmt"
"io"
"math/rand"
"time"
Expand Down Expand Up @@ -122,8 +123,11 @@ func pollOneoff(caller *wasmtime.Caller, subscriptionptr int32, eventsptr int32,
eventType := subs[inOffset+8]
argBuf := subs[inOffset+8+8:]

outOffset := i * eventsLen
slot := events[outOffset : outOffset+eventsLen]
slot, err := getSlot(events, i)
if err != nil {
return ErrnoFault
}

switch eventType {
case eventTypeClock:
// We want to stub out clock events,
Expand Down Expand Up @@ -227,3 +231,14 @@ func createRandomGet(cfg *ModuleConfig) func(caller *wasmtime.Caller, buf, bufLe
return ErrnoSuccess
}
}

func getSlot(events []byte, i int32) ([]byte, error) {
outOffset := i * eventsLen

if outOffset+eventsLen > int32(len(events)) {
return nil, fmt.Errorf("slot %d out of bounds", i)
}

slot := events[outOffset : outOffset+eventsLen]
return slot, nil
}
25 changes: 25 additions & 0 deletions pkg/workflows/wasm/host/wasip1_test.go
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
package host

import (
"testing"

"github.com/stretchr/testify/assert"
)

func TestGetSlot(t *testing.T) {
events := []byte{
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
250, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
}

expectedSlots := [][]byte{
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31},
{250, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63},
}

for i := int32(0); i < 2; i++ {
slot, err := getSlot(events, i)
assert.NoError(t, err)
assert.Equal(t, expectedSlots[i], slot)
}
}

0 comments on commit 74e909c

Please sign in to comment.