2022.1.0

[2022.1.0]

Added

• Architecture

  • Ariane SMP: enabled by adding ACE bus for L1 invalidations and modifying the ESP cache hierarchy (#146)
  • Hardware monitoring system: new implementation to enable easy access from software (#140)
  • Coherence modes for third-party accelerators: non-coherent DMA, llc-coherent-DMA, coherent-DMA

• Accelerators

  • Stratus HLS flow
    • FFT2: improves upon the FFT accelerator with support for batching, FFT sizes larger than accelerator private local memory, and inverse FFT

• Accelerator design flows

  • RTL accelerator design flow (#123)

• Software

  • Python3 support (#124)
  • Monitors API for performance evaluation (#140)
  • OpenSBI support for Ariane-based SoCs (#146)
  • Creation of a baremetal test library for baremetal applications not tied to an ESP accelerator
    • NVDLA with coherence selection
    • Monitors API
    • SLM tile test

Improved

• Architecture

  • Move NoC and JTAG to the top level of the tile (#122)
  • Reset of asynchronous FIFOs

• Accelerators

  • Stratus HLS flow
    • FFT: add batching
    • Nightvision: handle larger image sizes (#130)
  • Increase number of accelerator configuration registers from 14 to 48
  • Ensure accelerator reset is synchronous by adding register to DMA FSM

• Infrastructure

  • Use local paths for toolchain installation (#119)
  • Standardize selection of the number of LLC sets across cache implementations

• Software

  • Upgrade riscv-pk and update baremetal probe library (#120)

Fixed

• Architecture

  • Overflow issue in axislv2noc
  • CPU DMA to SLM tile
  • Proxies for ASIC memory link
  • Various latches and incomplete sensitivity lists

• Infrastructure

  • Xcelium compilation

• Software

  • RCU stall issue during Linux boot on Ariane mitigated with new kernel configuration
  • Various accelerator applications