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AxiSpiMaster - Fix bug in shadow RAM for multi-chip configurations #1205

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Description

The SHADOW_EN_G feature that reads from a shadow RAM was broken for cases when SPI_NUM_CHIPS_G > 1.
It would use the same shadow RAM of all chips. The RAM size has been increased so that there is a separate address space in the RAM for each chip.

@@ -55,8 +55,8 @@ entity AxiSpiMaster is
axiWriteMaster : in AxiLiteWriteMasterType;
axiWriteSlave : out AxiLiteWriteSlaveType;
-- Copy of the shadow memory (SHADOW_EN_G=true)
shadowAddr : in slv(ADDRESS_SIZE_G-1 downto 0) := (others => '0');
shadowData : out slv(DATA_SIZE_G-1 downto 0) := (others => '0');
shadowAddr : in slv(log2(SPI_NUM_CHIPS_G)+ADDRESS_SIZE_G-1 downto 0) := (others => '0');
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@bengineerd Should you use BitSize (instead of log2()) here?

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As it turns out neither log2 nor bitSize are correct. We want the function to return 0 when given SPI_NUM_CHIPS_G=1. Otherwise shadowAddr will be one bit larger than it was before and break builds. I will fix it.

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