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RISC-V: add
R_RISCV_CALL_PLT
relocation
See [1] fior details. [1]: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#relocations
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Class { | ||
#name : #'R_RISCV_CALL_PLT', | ||
#superclass : #AcRelocation, | ||
#pools : [ | ||
'AcIntLimits', | ||
'AcRISCVISALimits' | ||
], | ||
#category : #'ArchC-RISCV-Relocations' | ||
} | ||
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{ #category : #queries } | ||
R_RISCV_CALL_PLT class >> isValidForInstruction: insn [ | ||
^ insn name = 'auipc' | ||
] | ||
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{ #category : #processing } | ||
R_RISCV_CALL_PLT >> calculate: finalAddress [ | ||
" | ||
S + A - P | ||
S = finalAddress # Value of the symbol in the symbol table | ||
A = addend # Addend field in the relocation entry associated with the symbol | ||
P = address # Position of the relocation | ||
See https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#relocations | ||
" | ||
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| value | | ||
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value := finalAddress + addend - address. | ||
(value between: INT32_MIN and: INT32_MAX) ifFalse:[ | ||
"We better throw OverflowError but it does not exist in Pharo, sign" | ||
self error: 'Relocated value overflow / underflow'. | ||
]. | ||
^ value | ||
] | ||
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{ #category : #processing } | ||
R_RISCV_CALL_PLT >> fixupBinaryCode: memory value: value [ | ||
| lo hi code imms | | ||
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lo := value & (16rFFFFFFFF << RISCV_IMM_BITS) bitInvert32. | ||
hi := value & (16rFFFFFFFF << RISCV_IMM_BITS). | ||
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(lo & (1 << (RISCV_IMM_BITS - 1))) ~~ 0 ifTrue: [ | ||
hi := hi + (1 << RISCV_IMM_BITS). | ||
]. | ||
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imms := ByteArray new: 8. | ||
imms unsignedLongAt: 1 put: hi bigEndian: false. | ||
imms unsignedLongAt: 5 put: lo << RISCV_IMM_SHIFT bigEndian: false. | ||
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code := memory copyFrom: address to: address + 4"auipc" + 4"jalr". | ||
code := code bitOr: imms. | ||
memory replaceFrom: address to: address + 4"auipc" + 4"jalr" - 1 with: code. | ||
" | ||
AcProcessorDescriptions riscv64 decode: code | ||
" | ||
] |