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using reexport instead in macros
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romancardenas committed Jun 23, 2023
1 parent f3a98f7 commit 4abdbc4
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Showing 2 changed files with 7 additions and 1 deletion.
6 changes: 5 additions & 1 deletion hifive1-test/examples/hifive1.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ use hifive1::hal::DeviceResources;
use hifive1::{pin, sprintln};
use riscv_rt::entry;

use riscv_slic;

// generate SLIC code for this example, only adding a HW binding for RTC
// and a purely software SoftLow interrupt
riscv_slic::codegen!(e310x, [RTC], [SoftLow, SoftHigh]);
Expand All @@ -18,12 +20,14 @@ use slic::Interrupt; // Re-export of automatically generated enum of interrupts
#[allow(non_snake_case)]
#[no_mangle]
unsafe fn ClearRTC() {
sprintln!("-------------------");
sprintln!("!start ClearRTC");
// increase rtccmp to clear HW interrupt
let rtc = DeviceResources::steal().peripherals.RTC;
let rtccmp = rtc.rtccmp.read().bits();
rtc.rtccmp.write(|w| w.bits(rtccmp + 65536 * 2));
sprintln!("!stop ClearRTC (rtccmp = {})", rtccmp);
sprintln!("-------------------");
}

/// SW handler for RTC.
Expand All @@ -33,7 +37,7 @@ unsafe fn ClearRTC() {
unsafe fn RTC() {
sprintln!(" start RTC");
riscv_slic::pend(Interrupt::SoftLow);
sprintln!(" middle RTC");
// sprintln!(" middle RTC");
riscv_slic::pend(Interrupt::SoftHigh);
sprintln!(" stop RTC");
}
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2 changes: 2 additions & 0 deletions riscv-slic-macros/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,8 @@ pub fn codegen(input: TokenStream) -> TokenStream {

quote! {
pub mod slic {
use super::riscv_slic;

#api_code

#exti_export
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