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Merge pull request #1319 from riscv/cmo-editorial-fixes
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Adding *tval address explanation text.
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wmat authored Apr 5, 2024
2 parents 15b6cbb + 0cff842 commit 75a7fe1
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4 changes: 3 additions & 1 deletion src/cmo.adoc
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Expand Up @@ -89,7 +89,7 @@ a cache that first performs a read transfer from memory._

Caches organize copies of data into _cache blocks_, each of which represents a
contiguous, naturally aligned power-of-two (or _NAPOT_) range of memory
locations. A cache block is identified by a physical address corresponding to
locations. A cache block is identified by any of the physical addresses corresponding to
the underlying memory locations. The capacity and organization of a cache and
the size of a cache block are both _implementation-specific_, and the execution
environment provides software a means to discover information about the caches
Expand Down Expand Up @@ -381,6 +381,8 @@ exceptions and shall not access any caches or memory. During address
translation, the instruction does _not_ check the accessed and dirty bits and
neither raises an exception nor sets the bits.

When a page fault, guest-page fault, or access fault exception is taken, the relevant *tval CSR is written with the faulting effective address (i.e. the same faulting address value as for other causes of these exceptions).

[NOTE]
====
_Like a load or store instruction, a CMO instruction may or may not be permitted
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