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Reorganize and cleanup architecture-specific code (#83)
* Organize architecture-specific code into subdirectories. * Split per CPU data access and CPU feature detection into separate files. * Rename functions related to page mapping. * Reorganize architecture-specific definitions in header files. * Ensure object and dependency files don't conflict when assembly and C source files have the same name (e.g. thread.c vs thread.asm).
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/* | ||
* Copyright (C) 2019-2024 Philippe Aubertin. | ||
* All rights reserved. | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions | ||
* are met: | ||
* | ||
* 1. Redistributions of source code must retain the above copyright | ||
* notice, this list of conditions and the following disclaimer. | ||
* | ||
* 2. Redistributions in binary form must reproduce the above copyright | ||
* notice, this list of conditions and the following disclaimer in the | ||
* documentation and/or other materials provided with the distribution. | ||
* | ||
* 3. Neither the name of the author nor the names of other contributors | ||
* may be used to endorse or promote products derived from this software | ||
* without specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND | ||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY | ||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_CPUID_H | ||
#define JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_CPUID_H | ||
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#define CPUID_FEATURE_FPU (1<<0) | ||
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#define CPUID_FEATURE_PSE (1<<3) | ||
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#define CPUID_FEATURE_PAE (1<<6) | ||
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#define CPUID_FEATURE_APIC (1<<9) | ||
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#define CPUID_FEATURE_SEP (1<<11) | ||
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#define CPUID_FEATURE_PGE (1<<13) | ||
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#define CPUID_FEATURE_CLFLUSH (1<<19) | ||
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#define CPUID_FEATURE_NXE (1<<20) | ||
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#define CPUID_FEATURE_HTT (1<<28) | ||
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#define CPUID_EXT_FEATURE_SYSCALL (1<<11) | ||
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#define CPUID_VENDOR_AMD_DW0 0x68747541 /* Auth */ | ||
#define CPUID_VENDOR_AMD_DW1 0x69746e65 /* enti */ | ||
#define CPUID_VENDOR_AMD_DW2 0x444d4163 /* cAMD */ | ||
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#define CPUID_VENDOR_INTEL_DW0 0x756e6547 /* Genu */ | ||
#define CPUID_VENDOR_INTEL_DW1 0x49656e69 /* ineI */ | ||
#define CPUID_VENDOR_INTEL_DW2 0x6c65746e /* ntel */ | ||
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#endif |
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/* | ||
* Copyright (C) 2019-2024 Philippe Aubertin. | ||
* All rights reserved. | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions | ||
* are met: | ||
* | ||
* 1. Redistributions of source code must retain the above copyright | ||
* notice, this list of conditions and the following disclaimer. | ||
* | ||
* 2. Redistributions in binary form must reproduce the above copyright | ||
* notice, this list of conditions and the following disclaimer in the | ||
* documentation and/or other materials provided with the distribution. | ||
* | ||
* 3. Neither the name of the author nor the names of other contributors | ||
* may be used to endorse or promote products derived from this software | ||
* without specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND | ||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY | ||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_CPUINFO_H | ||
#define JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_CPUINFO_H | ||
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/* features */ | ||
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#define CPUINFO_FEATURE_CPUID (1<<0) | ||
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#define CPUINFO_FEATURE_SYSENTER (1<<1) | ||
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#define CPUINFO_FEATURE_SYSCALL (1<<2) | ||
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#define CPUINFO_FEATURE_LOCAL_APIC (1<<3) | ||
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#define CPUINFO_FEATURE_PAE (1<<4) | ||
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#define CPUINFO_FEATURE_PGE (1<<5) | ||
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#define CPUINFO_FEATURE_PSE (1<<6) | ||
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#define CPUINFO_FEATURE_NOEXEC (1<<7) | ||
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/* vendors */ | ||
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#define CPUINFO_VENDOR_GENERIC 0 | ||
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#define CPUINFO_VENDOR_AMD 1 | ||
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#define CPUINFO_VENDOR_INTEL 2 | ||
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#endif |
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Original file line number | Diff line number | Diff line change |
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/* | ||
* Copyright (C) 2019-2024 Philippe Aubertin. | ||
* All rights reserved. | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions | ||
* are met: | ||
* | ||
* 1. Redistributions of source code must retain the above copyright | ||
* notice, this list of conditions and the following disclaimer. | ||
* | ||
* 2. Redistributions in binary form must reproduce the above copyright | ||
* notice, this list of conditions and the following disclaimer in the | ||
* documentation and/or other materials provided with the distribution. | ||
* | ||
* 3. Neither the name of the author nor the names of other contributors | ||
* may be used to endorse or promote products derived from this software | ||
* without specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS "AS IS" AND | ||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY | ||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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#ifndef JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_MSR_H | ||
#define JINUE_KERNEL_INFRASTRUCTURE_I686_ASM_MSR_H | ||
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#define MSR_IA32_SYSENTER_CS 0x174 | ||
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#define MSR_IA32_SYSENTER_ESP 0x175 | ||
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#define MSR_IA32_SYSENTER_EIP 0x176 | ||
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#define MSR_EFER 0xC0000080 | ||
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#define MSR_STAR 0xC0000081 | ||
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#define MSR_FLAG_EFER_SCE (1<<0) | ||
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#define MSR_FLAG_EFER_NXE (1<<11) | ||
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#endif |
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