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This is a simple processor implemented using single cycle method. It implements 7 instructions of RISCV ISA: lw, sw, add, sub, and, or and beq.

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mariamhmousa/single_cycle_RISCV_processor

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This is a simple processor implemented using single cycle method. It implements 7 instructions of RISCV ISA: lw, sw, add, sub, and, or and beq.

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