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1. riscv-decoder-gen riscv-decoder-gen Public

   SystemVerilog 1

2. riscv-isa-sim riscv-isa-sim Public

   Forked from riscv-software-src/riscv-isa-sim

   Spike, a RISC-V ISA Simulator

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3. microprocessor-trend-data microprocessor-trend-data Public

   Forked from karlrupp/microprocessor-trend-data

   Data repository for my blog series on microprocessor trend data.

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4. gem5 gem5 Public

   Forked from gem5/gem5

   This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The…

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5. mcpat mcpat Public

   Forked from HewlettPackard/mcpat

   An integrated power, area, and timing modeling framework for multicore and manycore architectures

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6. Gem5ToMcPAT-Parser Gem5ToMcPAT-Parser Public

   Forked from Dhruv-Acharya/Gem5ToMcPAT-Parser

   Gem5 to McPAT parser with multicore and cache support

   Python