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  • University of Southampton
  • Southampton, UK

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Verilog AXI components for FPGA implementation

Verilog 1,658 481 Updated Feb 27, 2025

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

SystemVerilog 143 19 Updated Mar 27, 2025

Proxmox VE Helper-Scripts

Shell 14,841 2,527 Updated Nov 2, 2024

sixxsd - The SixXS Daemon - IPv6 Tunnel & Routing Engine

C 22 11 Updated May 3, 2018

Adapter for using HPE FlexibleLOM cards in full height PCIe slots

235 20 Updated Dec 29, 2022

Aquantia AQC multigigabit NIC FreeBSD driver - development preview

C 38 19 Updated Oct 26, 2022

Dark userCSS styles to use with Stylus addon.

CSS 41 1 Updated Dec 30, 2024

SpiNNaker API, sark, sc&mp, bmp firmware and build tools

C 18 4 Updated Feb 20, 2025

Manythread RISC-V overlay for FPGA clusters

Bluespec 36 2 Updated Oct 6, 2022

The Orchestrator is the configuration and run-time management system for POETS platforms.

C++ 2 2 Updated Oct 2, 2022
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