Add GPU video codecs support to nvproxy (so that tools like ffmpeg …

…work)

adding cap

tests work

fix merge

unit test

small fixes

additional ioctls for L4 gpu

images/benchmarks/ffmpeg/Dockerfile

@@ -7,3 +7,4 @@ RUN set -x \
         && rm -rf /var/lib/apt/lists/*
 WORKDIR /media
 ADD https://samples.ffmpeg.org/MPEG-4/video.mp4 video.mp4
+ADD https://samples.ffmpeg.org/A-codecs/Nelly_Moser/h264_NellyMoser.mp4 encoded.mp4

pkg/abi/nvgpu/classes.go

@@ -35,6 +35,7 @@ func (id ClassID) String() string {
 const (
 	NV01_ROOT                        = 0x00000000
 	NV01_ROOT_NON_PRIV               = 0x00000001
+	NV01_CONTEXT_DMA                 = 0x00000002
 	NV01_EVENT                       = 0x00000005
 	NV01_MEMORY_SYSTEM               = 0x0000003e
 	NV01_MEMORY_LOCAL_PRIVILEGED     = 0x0000003f
@@ -62,10 +63,20 @@ const (
 	GF100_SUBDEVICE_MASTER           = 0x000090e6
 	FERMI_VASPACE_A                  = 0x000090f1
 	KEPLER_CHANNEL_GROUP_A           = 0x0000a06c
+	NVENC_SW_SESSION                 = 0x0000a0bc
 	KEPLER_INLINE_TO_MEMORY_B        = 0x0000a140
 	VOLTA_USERMODE_A                 = 0x0000c361
 	TURING_USERMODE_A                = 0x0000c461
 	TURING_CHANNEL_GPFIFO_A          = 0x0000c46f
+	NVB8B0_VIDEO_DECODER             = 0x0000b8b0 // Hopper
+	NVC4B0_VIDEO_DECODER             = 0x0000c4b0 // Turing
+	NVC6B0_VIDEO_DECODER             = 0x0000c6b0 // Ampere
+	NVC7B0_VIDEO_DECODER             = 0x0000c7b0 // Ampere
+	NVC9B0_VIDEO_DECODER             = 0x0000c9b0 // Ada
+	NVCDB0_VIDEO_DECODER             = 0x0000cdb0 // Blackwell
+	NVC4B7_VIDEO_ENCODER             = 0x0000c4b7
+	NVC7B7_VIDEO_ENCODER             = 0x0000c7b7
+	NVC9B7_VIDEO_ENCODER             = 0x0000c9b7
 	AMPERE_CHANNEL_GPFIFO_A          = 0x0000c56f
 	TURING_A                         = 0x0000c597
 	TURING_DMA_COPY_A                = 0x0000c5b5
@@ -150,6 +161,19 @@ type NV2080_ALLOC_PARAMETERS struct {
 	SubDeviceID uint32
 }
 
+// NV_CONTEXT_DMA_ALLOCATION_PARAMS is the alloc params type for various NV01_CONTEXT_DMA
+// allocation classes, from src/common/sdk/nvidia/inc/nvos.h.
+//
+// +marshal
+type NV_CONTEXT_DMA_ALLOCATION_PARAMS struct {
+	HSubDevice Handle
+	Flags      uint32
+	HMemory    Handle
+	_          uint32
+	Offset     uint64
+	Limit      uint64
+}
+
 // NV_MEMORY_ALLOCATION_PARAMS is the alloc params type for various NV*_MEMORY*
 // allocation classes, from src/common/sdk/nvidia/inc/nvos.h.
 //
@@ -283,6 +307,26 @@ type NV_MEMORY_DESC_PARAMS struct {
 	CacheAttrib  uint32
 }
 
+// NV_BSP_ALLOCATION_PARAMETERS is the alloc params type for
+// NV*VIDEO_DECODER, from src/common/sdk/nvidia/inc/nvos.h.
+//
+// +marshal
+type NV_BSP_ALLOCATION_PARAMETERS struct {
+	Size                      uint32
+	ProhibitMultipleInstances uint32
+	EngineInstance            uint32
+}
+
+// NV_MSENC_ALLOCATION_PARAMETERS is the alloc params type for
+// NV*_VIDEO_ENCODER, from src/common/sdk/nvidia/inc/nvos.h.
+//
+// +marshal
+type NV_MSENC_ALLOCATION_PARAMETERS struct {
+	Size                      uint32
+	ProhibitMultipleInstances uint32
+	EngineInstance            uint32
+}
+
 // NV_CHANNEL_ALLOC_PARAMS is the alloc params type for TURING_CHANNEL_GPFIFO_A
 // and AMPERE_CHANNEL_GPFIFO_A, from
 // src/common/sdk/nvidia/inc/alloc/alloc_channel.h.
@@ -439,3 +483,15 @@ type NV00FD_ALLOCATION_PARAMETERS_V545 struct {
 type NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS struct {
 	Handle Handle
 }
+
+// NVA0BC_ALLOC_PARAMETERS is the alloc param type for
+// NVENC_SW_SESSION, from src/common/sdk/nvidia/inc/class/cla0bc.h
+//
+// +marshal
+type NVA0BC_ALLOC_PARAMETERS struct {
+	CodecType   uint32
+	HResolution uint32
+	VResolution uint32
+	Version     uint32
+	HMem        Handle
+}

pkg/abi/nvgpu/ctrl.go

@@ -258,6 +258,7 @@ const (
 	NV0080_CTRL_CMD_FIFO_GET_CAPS                      = 0x801701
 	NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES = 0x801707
 	NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST               = 0x80170d
+	NV0080_CTRL_CMD_FIFO_GET_CAPS_V2                   = 0x801713
 )
 
 // +marshal
@@ -290,8 +291,9 @@ type RmapiParamNvU32List struct {
 
 // From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gr.h:
 const (
-	NV0080_CTRL_CMD_GR_GET_CAPS = 0x801102
-	NV0080_CTRL_CMD_GR_GET_INFO = 0x801104
+	NV0080_CTRL_CMD_GR_GET_CAPS    = 0x801102
+	NV0080_CTRL_CMD_GR_GET_INFO    = 0x801104
+	NV0080_CTRL_CMD_GR_GET_CAPS_V2 = 0x801109
 )
 
 // NV0080_CTRL_GET_CAPS_PARAMS is used to represent the following:
@@ -319,6 +321,7 @@ type NV0080_CTRL_GR_ROUTE_INFO struct {
 // - NV2080_CTRL_FB_GET_INFO_PARAMS
 // - NV0041_CTRL_GET_SURFACE_INFO_PARAMS
 // - NV2080_CTRL_BIOS_GET_INFO_PARAMS
+// - NV2080_CTRL_BUS_GET_INFO_PARAMS
 //
 // +marshal
 type NvxxxCtrlXxxGetInfoParams struct {
@@ -362,6 +365,11 @@ const (
 	NV0080_CTRL_CMD_BSP_GET_CAPS_V2 = 0x801c02
 )
 
+// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080nvjpg.h
+const (
+	NV0080_CTRL_CMD_NVJPG_GET_CAPS_V2 = 0x801f02
+)
+
 // From src/common/sdk/nvidia/inc/ctrl/ctrl00f8.h:
 const (
 	NV00F8_CTRL_CMD_ATTACH_MEM = 0xf80103
@@ -391,6 +399,7 @@ const (
 const (
 	NV2080_CTRL_CMD_BUS_GET_PCI_INFO                   = 0x20801801
 	NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO               = 0x20801803
+	NV2080_CTRL_CMD_BUS_GET_INFO                       = 0x20801802
 	NV2080_CTRL_CMD_BUS_GET_INFO_V2                    = 0x20801823
 	NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS = 0x2080182a
 	NV2080_CTRL_CMD_BUS_GET_C2C_INFO                   = 0x2080182b
@@ -461,6 +470,7 @@ const (
 	NV2080_CTRL_CMD_GPU_GET_INFOROM_OBJECT_VERSION       = 0x2080014b
 	NV2080_CTRL_CMD_GPU_GET_INFOROM_IMAGE_VERSION        = 0x20800156
 	NV2080_CTRL_CMD_GPU_QUERY_INFOROM_ECC_SUPPORT        = 0x20800157
+	NV2080_CTRL_CMD_GPU_GET_ENCODER_CAPACITY             = 0x2080016c
 	NV2080_CTRL_CMD_GPU_GET_ENGINES_V2                   = 0x20800170
 	NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS         = 0x2080018b
 	NV2080_CTRL_CMD_GPU_GET_PIDS                         = 0x2080018d

pkg/abi/nvgpu/uvm.go

@@ -46,6 +46,7 @@ const (
 	UVM_MAP_DYNAMIC_PARALLELISM_REGION = 65
 	UVM_UNMAP_EXTERNAL                 = 66
 	UVM_ALLOC_SEMAPHORE_POOL           = 68
+	UVM_PAGEABLE_MEM_ACCESS_ON_GPU     = 70
 	UVM_VALIDATE_VA_RANGE              = 72
 	UVM_CREATE_EXTERNAL_RANGE          = 73
 	UVM_MM_INITIALIZE                  = 75
@@ -529,6 +530,19 @@ func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550) GetStatus() uint32 {
 	return p.RMStatus
 }
 
+// +marshal
+type UVM_PAGEABLE_MEM_ACCESS_ON_GPU_PARAMS struct {
+	GPUUUID           NvUUID
+	PageableMemAccess uint8
+	Pad               [3]byte
+	RMStatus          uint32
+}
+
+// GetStatus implements HasStatus.GetStatus.
+func (p *UVM_PAGEABLE_MEM_ACCESS_ON_GPU_PARAMS) GetStatus() uint32 {
+	return p.RMStatus
+}
+
 // +marshal
 type UVM_VALIDATE_VA_RANGE_PARAMS struct {
 	Base     uint64

pkg/sentry/devices/nvproxy/frontend.go

@@ -1180,6 +1180,15 @@ func rmAllocSMDebuggerSession(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_
 	})
 }
 
+func rmAllocContextDMA(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) {
+	return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CONTEXT_DMA_ALLOCATION_PARAMS) {
+		// See
+		// src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c:ctxdmaConstruct_IMPL()
+		// => refAddDependant().
+		fi.fd.dev.nvp.objAdd(fi.ctx, ioctlParams.HRoot, ioctlParams.HObjectNew, ioctlParams.HClass, newRmAllocObject(fi.fd, ioctlParams, rightsRequested, allocParams), ioctlParams.HObjectParent, allocParams.HMemory)
+	})
+}
+
 func rmAllocChannelGroup(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) {
 	return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS) {
 		// See

pkg/sentry/devices/nvproxy/nvconf/caps.go

@@ -47,7 +47,7 @@ const (
 	// SupportedDriverCaps is the set of driver capabilities that are supported by
 	// nvproxy. Similar to
 	// nvidia-container-toolkit/internal/config/image/capabilities.go:SupportedDriverCapabilities.
-	SupportedDriverCaps = DriverCaps(CapCompute | CapUtility | CapGraphics)
+	SupportedDriverCaps = DriverCaps(CapCompute | CapUtility | CapGraphics | CapVideo)
 
 	// DefaultDriverCaps is the set of driver capabilities that are enabled by
 	// default in the absence of any other configuration. See

pkg/sentry/devices/nvproxy/seccomp_filters.go

@@ -60,8 +60,8 @@ func frontendIoctlFilters(enabledCaps nvconf.DriverCaps) []seccomp.SyscallRule {
 		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_MAP_MEMORY, nvgpu.SizeofIoctlNVOS33ParametersWithFD)), compUtil},
 		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_UNMAP_MEMORY, nvgpu.SizeofNVOS34Parameters)), compUtil},
 		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_ALLOC_CONTEXT_DMA2, nvgpu.SizeofNVOS39Parameters)), nvconf.CapGraphics},
-		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_MAP_MEMORY_DMA, nvgpu.SizeofNVOS46Parameters)), nvconf.CapGraphics},
-		{seccomp.MaskedEqual(notIocSizeMask, frontendIoctlCmd(nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA, 0)), nvconf.CapGraphics},
+		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_MAP_MEMORY_DMA, nvgpu.SizeofNVOS46Parameters)), nvconf.CapGraphics | nvconf.CapVideo},
+		{seccomp.MaskedEqual(notIocSizeMask, frontendIoctlCmd(nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA, 0)), nvconf.CapGraphics | nvconf.CapVideo},
 		{seccomp.EqualTo(frontendIoctlCmd(nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO, nvgpu.SizeofNVOS56Parameters)), compUtil},
 	} {
 		if feIoctl.caps&enabledCaps != 0 {
@@ -107,6 +107,7 @@ func uvmIoctlFilters(enabledCaps nvconf.DriverCaps) []seccomp.SyscallRule {
 		{seccomp.EqualTo(nvgpu.UVM_TOOLS_WRITE_PROCESS_MEMORY), nvconf.ValidCapabilities},
 		{seccomp.EqualTo(nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION), compUtil},
 		{seccomp.EqualTo(nvgpu.UVM_UNMAP_EXTERNAL), compUtil},
+		{seccomp.EqualTo(nvgpu.UVM_PAGEABLE_MEM_ACCESS_ON_GPU), nvconf.CapVideo},
 		{seccomp.EqualTo(nvgpu.UVM_ALLOC_SEMAPHORE_POOL), compUtil},
 		{seccomp.EqualTo(nvgpu.UVM_VALIDATE_VA_RANGE), compUtil},
 		{seccomp.EqualTo(nvgpu.UVM_CREATE_EXTERNAL_RANGE), compUtil},