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Issues: google/globalfoundries-pdk-ip-gf180mcu_fd_ip_sram
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Add example which generates the .lef / .cdl (.spice) from the GDS using Magic
#4
opened Jul 20, 2022 by
mithro
Add test benches and example digital simulations for the .v (verilog) files
#3
opened Jul 20, 2022 by
mithro
Add test benches and example (spice / analog) simulations for the .cdl files
#2
opened Jul 20, 2022 by
mithro
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