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                  Copyright XXXX-XXXX / CorporateName

                   Core description here to be done
                      powered by Migen & LiteX

[> Intro

LiteHelloWorld is a Litex core template repository that can be used to quick start a custom core design.

LiteHelloWorld is part of LiteX libraries whose aims are to lower entry level of complex FPGA cores by providing simple, elegant and efficient implementations of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller...

Using Migen to describe the HDL allows the core to be highly and easily configurable.

LiteHelloWorld can be used as LiteX library or can be integrated with your standard design flow by generating the verilog rtl that you will use as a standard core.

[> Features

TBD

[> FPGA Proven

TBD

[> Possible improvements

TBD

[> Getting started

1. Install Python 3.6+ and FPGA vendor's development tools.
2. Install LiteX and the cores by following the LiteX's wiki installation guide.
3. FIXME: INSTALL NEEDED?? ./setup.py develop --user

[> Tests

Unit tests are available in ./test/. To run all the unit tests:

$ ./setup.py test

Tests can also be run individually:

$ python3 -m unittest test.test_name

[> License

Custom licence to be indicated here.

[> Support and consulting

We love open-source hardware and like sharing our designs with others.

If you would like to know more about LiteHelloWorld or if you are already a happy user and would like to extend it for your needs, EnjoyDigital can provide standard commercial support as well as consulting services.

So feel free to contact us, we'd love to work with you! (and eventually shorten the list of the possible improvements :)

[> Contact

E-mail: florent [AT] enjoy-digital.fr