π
MTech VLSI
π¨βπ» Research Interests:
VLSI Architecture and Design|
Digital Circuit Design|
Low-Power VLSI Design|
ASIC|
FPGA|
Hardware
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IIIT-Bangalore
- Chennai,TN
- in/emil-jayanth-lal-49491b16a
Popular repositories Loading
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RISC-V_based_MYTH_IIITB
RISC-V_based_MYTH_IIITB PublicRISC-V | TL-Verilog | Pipe-lining | Micro-Architecture | Makechip
TL-Verilog 2
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PR_with_image_processing
PR_with_image_processing PublicPartial reconfiguration done for Image Processing | Image viewed through VGA | FPGA
Verilog 2
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Advanced_Physical_Design_using_OpenLANE-Sky130
Advanced_Physical_Design_using_OpenLANE-Sky130 PublicPhysical Design using Openlane
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IIITB_auto_room_lc
IIITB_auto_room_lc PublicPhysical Design of Automated room lighting | RISC-V
Verilog
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