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Allow GPIO ISR and state read on UP2 #1030

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AndreasAZiegler
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@AndreasAZiegler AndreasAZiegler commented Jul 22, 2020

This PR addresses #937.

By setting chardev_capable = 0 it is possible to activate ISR on a pin AND read the state of the pin out.

With this change it is possible to activate ISR on a GPIO on the UP2
board and read its state.

Signed-off-by: Andreas Ziegler <[email protected]>
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Propanu commented Aug 6, 2020

Hi @AndreasAZiegler, unfortunately this will also reduce GPIO read/write performance so my take is somehow it has to be offered as an option instead. I'll add a comment with more details on #937, I think what you're really asking for is for AAEON to update their pinmuxing driver.

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@Propanu Thanks for your information.
Would you mind, pointing me towards the place(s) where it is best to add such an option. Furthermore, do you know if it makes sense to report this to AAEON respectively is this already reported?

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Propanu commented Aug 13, 2020

There were definitely some attempts to enable interrupts with the pinctrl driver Emutex provided by the community, but it's very likely you'll need to build it from source to get kernel ISR support for the board. Here are some links for the driver and the discussion I mentioned:

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