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Starred repositories

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🌸 A command-line fuzzy finder

Go 69,084 2,484 Updated Mar 30, 2025

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

SystemVerilog 154 20 Updated Mar 27, 2025

Get up and running with Llama 3.3, DeepSeek-R1, Phi-4, Gemma 3, and other large language models.

Go 135,586 11,263 Updated Apr 1, 2025

Ceilings - Rustlings and Ziglings for C!

C 20 2 Updated Jan 12, 2025

Making cocotb testbenches that bit easier

Python 29 1 Updated Mar 27, 2025

Un regroupement de notebooks pour apprendre le deep learning à partir de 0

Jupyter Notebook 52 6 Updated Aug 27, 2024

Repository gathering basic modules for CDC purpose

SystemVerilog 53 8 Updated Dec 31, 2019

Minimal, fast, and extensible fuzzy finder.

Vim Script 80 10 Updated Jan 20, 2025

Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.

838 91 Updated Jan 20, 2025

GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.

C 9 1 Updated Jun 11, 2024

A compact USB HID host FPGA core supporting keyboards, mice and gamepads.

Verilog 121 21 Updated Mar 22, 2025

Collection of Vim themes with barely any colors

881 19 Updated Dec 23, 2022

A color scheme for Neovim

Lua 179 13 Updated Nov 12, 2024

LLM inference in C/C++

C++ 77,472 11,272 Updated Apr 1, 2025

The simplest, fastest repository for training/finetuning medium-sized GPTs.

Python 40,409 6,661 Updated Dec 9, 2024

Pool arena implementation

C 2 Updated Mar 26, 2023

Templated type-safe hashmap implementation in C using open addressing and linear probing for collision resolution.

C 273 54 Updated Sep 9, 2024

Convert any music library into a music production sample-library with ML

Python 1,529 117 Updated Aug 17, 2024

Learn about the Neumorphic engineering process of creating large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures.

Python 429 59 Updated Jan 4, 2024

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

SystemVerilog 904 285 Updated Nov 15, 2024

RISC-V Verification Interface

C 86 15 Updated Feb 19, 2025

Remote UI proof of concept using microui.

C 4 2 Updated Oct 6, 2021

A tiny immediate-mode UI library

C 3,784 263 Updated Aug 13, 2024

A small, usability-oriented generic container library.

C 262 9 Updated Apr 1, 2025

Check syntax in Vim/Neovim asynchronously and fix files, with Language Server Protocol (LSP) support

Vim Script 13,714 1,452 Updated Mar 31, 2025

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Verilog 320 83 Updated Apr 30, 2024

Digital timing diagram editor

JavaScript 990 163 Updated Jan 29, 2025

Apple's SFMono font nerd-font patched and ligaturized

844 64 Updated Jul 2, 2023

Parser for argv that works similarly to getopt

C 184 18 Updated Oct 31, 2023
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