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Add picture of Dillo on a FPGA RISC-V CPU
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rodarima committed Nov 27, 2024
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11 changes: 11 additions & 0 deletions gallery/index.html
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Expand Up @@ -215,6 +215,17 @@ <h2>Devices</h2>
<h2>Screenshots</h2>
<p>Screenshots of Dillo taken from the device itself.</p>

<figure>
<a href="img/fpga-rv32.jpg">
<img alt="Dillo running on a FPGA" src="thumb/fpga-rv32.jpg"></a>
<figcaption>
<b>2024-11-20</b> -
Dillo 3.1.1 on a FPGA RISC-V CPU at 100 MHz with 64 MiB of RAM.
[<a href="http://www.fleasystems.com/">1</a>,
<a href="https://github.com/SpinalHDL/VexRiscv">2</a>].
</figcaption>
</figure>

<figure>
<a href="img/macos-tiger.png">
<img alt="Dillo running on Mac OS X Tiger 10.4" src="thumb/macos-tiger.jpg">
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