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denishoornaert edited this page Sep 5, 2019
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The repository contains the source code implementing in Chisel3 a floating point representation compliant with ieee754. The objective being to use it in the designing of hardware accelerators or co-processors running alongside traditional CPUs (e.g. Xilinx Zynq & UltraScale, Intel Stratix), only the implementation of 32 bit float (float
), 64 bit float (double
) and 128 bit float (long double
) are considered for the time being.