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parsed with: surelog -parse -elabuhdm a1.sv produces UHDM Tree which doesn't contain [3:2]
and [1:0] range selects. This is easily visible, because SystemVerilog code (a2.sv):
Surelog sometimes discards last range select after access to struct member
SystemVerilog code (a1.sv):
parsed with:
surelog -parse -elabuhdm a1.sv
produces UHDM Tree which doesn't contain[3:2]
and
[1:0]
range selects. This is easily visible, because SystemVerilog code (a2.sv):produces identical UHDM Tree (with accuracy to debug information). Here is UHDM Tree fragment that is responsible for one of those assignments:
This example is trimmed down version of code from OpenTitan.
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