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x86: update read/write registers for transfer instructions #2578

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merged 7 commits into from
Dec 15, 2024
Merged

x86: update read/write registers for transfer instructions #2578

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cfd37e9
Add SP and PC read/write for call instructions
hainest Nov 27, 2024
cf1dabe
Add BP and SP read/write for enter instruction
hainest Nov 27, 2024
be23eaa
Add write to PC for all jump instructions
hainest Nov 27, 2024
d947fd1
Add DS read to lods* instructions
hainest Nov 27, 2024
ae50e0f
Add read/write segment registers and stack pointer for push
hainest Nov 27, 2024
b1ef9a2
Add IP and SP writes for ret
hainest Dec 5, 2024
bc11b5e
Add ES read for SCAS* and STOS*
hainest Dec 7, 2024
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19 changes: 0 additions & 19 deletions arch/X86/X86Mapping.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1153,25 +1153,6 @@ void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
break;
}
break;

case X86_INS_RET:
switch(h->mode) {
case CS_MODE_16:
insn->detail->regs_write[0] = X86_REG_SP;
insn->detail->regs_read[0] = X86_REG_SP;
break;
case CS_MODE_32:
insn->detail->regs_write[0] = X86_REG_ESP;
insn->detail->regs_read[0] = X86_REG_ESP;
break;
default: // 64-bit
insn->detail->regs_write[0] = X86_REG_RSP;
insn->detail->regs_read[0] = X86_REG_RSP;
break;
}
insn->detail->regs_write_count = 1;
insn->detail->regs_read_count = 1;
break;
}

memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
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