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feat(v2foxy) Using const method for decoding.
1 parent 9fd68b3 commit f23fcae

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8 files changed

+53
-26
lines changed

8 files changed

+53
-26
lines changed

cargo.toml

+1
Original file line numberDiff line numberDiff line change
@@ -4,4 +4,5 @@ version = "0.1.0"
44
edition = "2021"
55

66
[dependencies]
7+
proc-bitfield = "0.4.0"
78
thiserror = "1.0.63"

examples/counter.rs

+6-12
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,16 @@
11
extern crate arrseq_lightning;
22

3-
use arrseq_lightning::instruction::{address, Instruction, operation, RegisterCode};
4-
use arrseq_lightning::instruction::address::{Address};
5-
use arrseq_lightning::instruction::branch::Flag;
6-
use arrseq_lightning::num::MaskedU8;
3+
use arrseq_lightning::instruction::{Instruction, LargeImmediate, register, SegmentCode};
4+
use arrseq_lightning::instruction::load_immediate::{Immediate, Segment};
75

86
fn main() {
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let c_max = 10u16;
108

119
let program = [
12-
Instruction::LoadImmediate { destination: RegisterCode::new(0), segment: MaskedU8::new(0), immediate: c_max }, // li r0, c_max
13-
Instruction::DualSource { operation: operation::DualSource::Compare, sources: [RegisterCode::new(0), RegisterCode::new(1)] }, // cmp r0, r1
14-
Instruction::Branch { hint: None, condition: Flag::Zero, address: Address::Immediate { immediate: address::LargeImmediate::new(8), mode: address::Mode::Relative }}, // jz pc+8
15-
Instruction::Memory { operation: operation::Memory::Branch, address: Address::Immediate { immediate: address::LargeImmediate::new(4), mode: address::Mode::Absolute }}, // jmp 0
16-
Instruction::WaitForInterrupt // hlt
10+
Instruction::LoadImmediate {
11+
destination: register::Code::new(0),
12+
segment: Segment::Segment0(Immediate::new(c_max as u32))
13+
} // hlt
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1815
// pseudo code:
1916
//
@@ -25,7 +22,4 @@ fn main() {
2522
// }
2623
// ```
2724
];
28-
29-
// dbg!(Instruction::decode(0b1000_1000_1000_1000_0001_1000_0000010));
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dbg!(Instruction::decode(0b11_111_110_100_110_101_000_00000_0100001));
3125
}

src/core.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
1-
pub mod arithmetic;
1+
use crate::instruction::register;
22

3-
use crate::instruction::RegisterCode;
3+
pub mod arithmetic;
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55
#[derive(Debug, Clone, Copy, PartialEq)]
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pub struct State {
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pub instruction_pointer: u64,
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// TODO: Operand modifiers state
9-
pub general: [u64; RegisterCode::MASK as usize],
9+
pub general: [u64; register::Code::MASK as usize],
1010
// pub general_vectors: []
1111
}
1212

src/core/arithmetic.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
use crate::core::Core;
2-
use crate::instruction::RegisterCode;
2+
use crate::instruction::register;
33

44
impl Core {
5-
pub fn add(&mut self, destination: RegisterCode, sources: [RegisterCode; 2]) {
5+
pub fn add(&mut self, destination: register::Code, sources: [register::Code; 2]) {
66
todo!()
77
}
88
}

src/instruction.rs

+29-7
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,40 @@
1-
use crate::instruction::address::{AccessMode, Address};
2-
use crate::num::{MaskedU32, MaskedU8};
1+
use crate::num::MaskedU8;
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43
pub mod address;
54
pub mod vector;
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pub mod branch;
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pub mod encoding;
8-
mod register;
9-
mod arithmetic;
7+
pub mod register;
8+
pub mod arithmetic;
9+
pub mod load_immediate;
1010

1111
pub type SegmentCode = MaskedU8<0x3>;
12-
pub type LargeImmediate = MaskedU32<0x1FFFFF>;
1312
pub type ScaleCode = MaskedU8<0x03>;
1413

14+
pub const STACK_SOURCE_MASK: (u8, u32) = (0, 0b0000000000000000000000011111);
15+
pub const UNSTACK_DEST_MASK: (u8, u32) = (0, 0b0000000000000000000000011111);
16+
17+
pub const LOAD_IMMEDIATE_DESTINATION_MASK: (u8, u32) = (0, 0b0000000000000000000000011111);
18+
pub const LOAD_IMMEDIATE_SEGMENT_MASK : (u8, u32) = (5, 0b0000000000000000000001100000);
19+
pub const LOAD_IMMEDIATE_OFFSET_MASK : (u8, u32) = (7, 0b1111111111111111111110000000);
20+
21+
pub const BUILD_VECTOR_DESTINATION_MASK: (u8, u32) = (0, 0b0000000000000000000000011111);
22+
pub const BUILD_VECTOR_COMPONENT_0_MASK: (u8, u32) = (5, 0b0000000000000000001111100000);
23+
pub const BUILD_VECTOR_COMPONENT_1_MASK: (u8, u32) = (10, 0b0000000000000111110000000000);
24+
pub const BUILD_VECTOR_COMPONENT_2_MASK: (u8, u32) = (15, 0b0000000011111000000000000000);
25+
pub const BUILD_VECTOR_COMPONENT_3_MASK: (u8, u32) = (20, 0b0001111100000000000000000000);
26+
27+
pub const UNBUILD_VECTOR_SOURCE_MASK : (u8, u32) = (0, 0b0000000000000000000000011111);
28+
pub const UNBUILD_VECTOR_DESTINATION_0_MASK: (u8, u32) = (5, 0b0000000000000000001111100000);
29+
pub const UNBUILD_VECTOR_DESTINATION_1_MASK: (u8, u32) = (10, 0b0000000000000111110000000000);
30+
pub const UNBUILD_VECTOR_DESTINATION_2_MASK: (u8, u32) = (15, 0b0000000011111000000000000000);
31+
pub const UNBUILD_VECTOR_DESTINATION_3_MASK: (u8, u32) = (20, 0b0001111100000000000000000000);
32+
33+
pub const COPY_REGISTER_DESTINATION_FILE_MASK: (u8, u32) = (0, 0b0000000000000000000000000011);
34+
pub const COPY_REGISTER_DESTINATION_MASK : (u8, u32) = (0, 0b0000000000000000000001111100);
35+
pub const COPY_REGISTER_SOURCE_FILE_MASK : (u8, u32) = (0, 0b0000000000000000000110000000);
36+
pub const COPY_REGISTER_SOURCE_MASK : (u8, u32) = (0, 0b0000000000000011111000000000);
37+
1538
#[derive(Debug, Clone, Copy, PartialEq)]
1639
pub enum Instruction {
1740
None,
@@ -26,8 +49,7 @@ pub enum Instruction {
2649

2750
LoadImmediate {
2851
destination: register::Code,
29-
segment: SegmentCode,
30-
immediate: LargeImmediate
52+
segment: load_immediate::Segment
3153
},
3254
BuildVector {
3355
destination: register::Code,

src/instruction/address.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
use crate::instruction::{register, ScaleCode};
1+
use crate::instruction::{ScaleCode};
22
use crate::num::MaskedU32;
33

44
#[derive(Debug, Clone, Copy, PartialEq)]

src/instruction/load_immediate.rs

+11
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
use crate::num::MaskedU32;
2+
3+
pub type Immediate = MaskedU32<0x1FFFFF>;
4+
5+
#[derive(Debug, Clone, Copy, PartialEq)]
6+
pub enum Segment {
7+
Segment0(Immediate),
8+
Segment1(Immediate),
9+
Segment2(Immediate),
10+
Segment3(bool)
11+
}

src/instruction/vector.rs

-1
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@@ -1,4 +1,3 @@
1-
use crate::instruction::OperandCode;
21
use crate::num::MaskedU8;
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43
pub type ComponentCode = MaskedU8<0x3>;

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