src: bound riscv_load_store_rand_addr_instr_stream

Signed-off-by: Filip Kokosinski <[email protected]>
antmicro · Jun 27, 2024 · c626b2e · c626b2e
1 parent c2fab37
commit c626b2e
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/riscv_load_store_instr_lib.sv b/src/riscv_load_store_instr_lib.sv
@@ -433,7 +433,7 @@ class riscv_load_store_rand_addr_instr_stream extends riscv_load_store_base_inst
   constraint addr_offset_c {
     |addr_offset[XLEN-1:20] == 1'b1;
     // TODO(taliu) Support larger address range
-    addr_offset[XLEN-1:31] == 0;
+    addr_offset[XLEN-1:26] == 0;
     addr_offset[11:0] == 0;
   }