Dynamic array element access in constraints

Signed-off-by: Ryszard Rozak <[email protected]>
antmicro · Nov 8, 2024 · 375d862 · 375d862
1 parent f942ff6
commit 375d862
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Showing 3 changed files with 16 additions and 16 deletions.
diff --git a/src/riscv_amo_instr_lib.sv b/src/riscv_amo_instr_lib.sv
@@ -121,24 +121,24 @@ class riscv_lr_sc_instr_stream extends riscv_amo_base_instr_stream;
     lr_instr = riscv_instr::get_rand_instr(.include_instr({allowed_lr_instr}));
     sc_instr = riscv_instr::get_rand_instr(.include_instr({allowed_sc_instr}));
     `DV_CHECK_RANDOMIZE_WITH_FATAL(lr_instr,
-      rs1 == rs1_reg[0];
+      rs1 == rs1;
       if (reserved_rd.size() > 0) {
         !(rd inside {reserved_rd});
       }
       if (cfg.reserved_regs.size() > 0) {
         !(rd inside {cfg.reserved_regs});
       }
-      rd != rs1_reg[0];
+      rd == rd;
     )
     `DV_CHECK_RANDOMIZE_WITH_FATAL(sc_instr,
-      rs1 == rs1_reg[0];
+      rs1 == rs1;
       if (reserved_rd.size() > 0) {
         !(rd inside {reserved_rd});
       }
       if (cfg.reserved_regs.size() > 0) {
         !(rd inside {cfg.reserved_regs});
       }
-      rd != rs1_reg[0];
+      rd == rd;
     )
     instr_list.push_back(lr_instr);
     instr_list.push_back(sc_instr);

diff --git a/src/riscv_load_store_instr_lib.sv b/src/riscv_load_store_instr_lib.sv
@@ -358,8 +358,8 @@ class riscv_multi_page_load_store_instr_stream extends riscv_mem_access_stream;
         end
       end
       `DV_CHECK_RANDOMIZE_WITH_FATAL(load_store_instr_stream[i],
-                                     rs1_reg[0] == rs1_reg[i];
-                                     data_page_id[0] == data_page_id[i];,
+                                     rs1_reg == rs1_reg;
+                                     data_page_id == data_page_id;,
                                      "Cannot randomize load/store instruction")
       // Mix the instruction stream of different page access, this could trigger the scenario of
       // frequent data TLB switch

diff --git a/src/riscv_loop_instr.sv b/src/riscv_loop_instr.sv
@@ -110,18 +110,18 @@ class riscv_loop_instr extends riscv_rand_instr_stream;
       // Instruction to init the loop counter
       loop_init_instr[2*i] = riscv_instr::get_rand_instr(.include_instr({ADDI}));
       `DV_CHECK_RANDOMIZE_WITH_FATAL(loop_init_instr[2*i],
-                                     rd == loop_cnt_reg[i];
+                                     rd == rd;
                                      rs1 == ZERO;
-                                     imm == loop_init_val[i];,
+                                     imm == imm;,
                                      "Cannot randomize loop init insturction")
       loop_init_instr[2*i].comment = $sformatf("init loop %0d counter", i);
 
       // Instruction to init loop limit
       loop_init_instr[2*i+1] = riscv_instr::get_rand_instr(.include_instr({ADDI}));
       `DV_CHECK_RANDOMIZE_WITH_FATAL(loop_init_instr[2*i+1],
-                                     rd == loop_limit_reg[i];
+                                     rd == rd;
                                      rs1 == ZERO;
-                                     imm == loop_limit_val[i];,
+                                     imm == imm;,
                                      "Cannot randomize init loop instruction")
       loop_init_instr[2*i+1].comment = $sformatf("init loop %0d limit", i);
 
@@ -141,18 +141,18 @@ class riscv_loop_instr extends riscv_rand_instr_stream;
       // Instruction to update loop counter
       loop_update_instr[i] = riscv_instr::get_rand_instr(.include_instr({ADDI}));
       `DV_CHECK_RANDOMIZE_WITH_FATAL(loop_update_instr[i],
-                                     rd == loop_cnt_reg[i];
-                                     rs1 == loop_cnt_reg[i];
-                                     imm == loop_step_val[i];,
+                                     rd == rd;
+                                     rs1 == rs1;
+                                     imm == imm;,
                                      "Cannot randomize loop update instruction")
       loop_update_instr[i].comment = $sformatf("update loop %0d counter", i);
 
       // Backward branch instruction
       loop_branch_instr[i] = riscv_instr::get_rand_instr(.include_instr({branch_type[i]}));
       `DV_CHECK_RANDOMIZE_WITH_FATAL(loop_branch_instr[i],
-                                     rs1 == loop_cnt_reg[i];
-                                     if (!(branch_type[i] inside {C_BEQZ, C_BNEZ})) {
-                                       rs2 == loop_limit_reg[i];
+                                     rs1 == rs1;
+                                     if (!(C_BEQZ inside {C_BEQZ, C_BNEZ})) {
+                                        rs2 == rs2;
                                      },
                                      "Cannot randomize backward branch instruction")
       loop_branch_instr[i].comment = $sformatf("branch for loop %0d", i);