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Move CI designs to a separate repository (#1867)
~ Move test designs to a separate repository and add it as a submodule. ~ Adjust test set to refer to designs in submodule. ~ Change design_dir in `run_tests.py` for artifact upload in the CI. ~ Fix fail condition on design name mismatch in `compare_regression_reports.py` ~ Print a better error message for design name mismatch mentioned previously. ~ Change regression benchmark to point reflect submodule change. ~ Change documentation to reflect new paths of designs. + Add aes_user_project_wrapper to ci designs to test EXTRA_SPEFS. + Add a step in CI workflow to replace `/` with `_` in design name for artifact upload.
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,41 +1,42 @@ | ||
- scl: sky130A/sky130_fd_sc_hd | ||
name: fastest_test_set | ||
designs: | ||
- inverter | ||
- wbqspiflash | ||
- APU | ||
- s44 | ||
- zipdiv | ||
- xtea | ||
- usb | ||
- usb_cdc_core | ||
- manual_macro_placement_test | ||
- ./designs/ci/inverter | ||
- ./designs/ci/wbqspiflash | ||
- ./designs/ci/APU | ||
- ./designs/ci/s44 | ||
- ./designs/ci/zipdiv | ||
- ./designs/ci/xtea | ||
- ./designs/ci/usb | ||
- ./designs/ci/usb_cdc_core | ||
- ./designs/ci/manual_macro_placement_test | ||
- spm | ||
- gcd | ||
- caravel_upw | ||
- ./designs/ci/gcd | ||
- ./designs/ci/caravel_upw | ||
- ./designs/ci/aes_user_project_wrapper | ||
- scl: sky130A/sky130_fd_sc_hd | ||
name: extended_test_set | ||
designs: | ||
- BM64 | ||
- salsa20 | ||
- aes_core | ||
- blabla | ||
- picorv32a | ||
- PPU | ||
- y_huff | ||
- aes | ||
- ./designs/ci/BM64 | ||
- ./designs/ci/salsa20 | ||
- ./designs/ci/aes_core | ||
- ./designs/ci/blabla | ||
- ./designs/ci/picorv32a | ||
- ./designs/ci/PPU | ||
- ./designs/ci/y_huff | ||
- ./designs/ci/aes | ||
- scl: gf180mcuC/gf180mcu_fd_sc_mcu7t5v0 | ||
name: fastest_test_set | ||
designs: | ||
- spm | ||
- APU | ||
- usb | ||
- ./designs/ci/APU | ||
- ./designs/ci/usb | ||
# - usb_cdc_core | ||
# - zipdiv | ||
# - wbqspiflash | ||
- scl: gf180mcuC/gf180mcu_fd_sc_mcu7t5v0 | ||
name: extended_test_set | ||
designs: | ||
- picorv32a | ||
- PPU | ||
- y_huff | ||
- ./designs/ci/picorv32a | ||
- ./designs/ci/PPU | ||
- ./designs/ci/y_huff |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,3 @@ | ||
[submodule "designs/ci"] | ||
path = designs/ci | ||
url = https://github.com/efabless/openlane-ci-designs |
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