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cpu_pause.c: fix typo
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Signed-off-by: TaiJuWu <[email protected]>
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TaiJuWu authored and davids5 committed Oct 14, 2023
1 parent f196d10 commit 1989749
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Showing 10 changed files with 10 additions and 10 deletions.
2 changes: 1 addition & 1 deletion arch/arm/src/armv7-a/arm_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm/src/armv7-r/arm_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm/src/cxd56xx/cxd56_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -172,7 +172,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm/src/lc823450/lc823450_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm/src/rp2040/rp2040_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -140,7 +140,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm/src/sam34/sam4cm_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/arm64/src/common/arm64_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/risc-v/src/common/riscv_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/sim/src/sim/sim_smpsignal.c
Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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2 changes: 1 addition & 1 deletion arch/sparc/src/s698pm/s698pm_cpupause.c
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
* However, it is sometimes necessary necessary to perform the pending
* However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
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