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  1. uart_v1 uart_v1 Public

    uart module verilog

    Verilog 1

  2. ota_5t ota_5t Public

    5 Transistor Single ended operational amplifier design with fully open source tools.

    Tcl

  3. tiny-SAR tiny-SAR Public

    8-bit Succesive approximation register analog to digital converter (SAR-ADC)

    Makefile

  4. tt09-TinyTPU-Reforged tt09-TinyTPU-Reforged Public template

    Forked from TinyTapeout/tt09-verilog-template

    Tiny-Tapeout-9, TinyTPU submission with timing report. Aim is to implement

    Verilog