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Waveform diagram for issue:
The BTB SRAM chip select signal is active when the reset signal is active, but there is no initialization operation at this time. The initialization of the BTB SRAM occurs after the reset signal is deasserted.
Commonality between the two issues: Both involve the Queue signal or SRAM chip select signal being active while the reset signal is active.
Resetting:Queue
io.enq.ready
is 1 => IFUio.imem.req.valid
is 1 => Cache SRAM's CE is 1(valid)Resetting:
_resetState
is 1 => BTB SRAM's CE is 1 (Valid) (before the initialization of the BTB SRAM)Simulation results after code modification
command:
./build/emu -b 0 -e 0 -i ./ready-to-run/linux.bin -C 200000000 --diff ./ready-to-run/riscv64-nemu-interpreter-so