plat-marvell: register DDR for dynamic shared memory

[vjardin]

Register non-secure DDR memory region for Armada 7K/8K and Armada 3700 platforms to enable dynamic shared memory support.

Without this, U-Boot's OP-TEE driver fails to probe with: "OP-TEE capabilities mismatch"

The U-Boot OPTEE driver requires OPTEE_SMC_SEC_CAP_DYNAMIC_SHM capability, which is advertised when core_mmu_nsec_ddr_is_defined() returns true.

The registered region starts after the reserved shared memory (CFG_SHMEM_START + CFG_SHMEM_SIZE) and extends to the end of DRAM. DRAM_SIZE defaults to 2GB but can be overridden at build time for boards with different memory configurations.

[github-actions]

FYI @taovcu

[vjardin]

tested on platform with uboot:

>> optee hello
D/TC:? 0 tee_ta_init_pseudo_ta_session:303 Lookup pseudo TA 8aaaf200-2450-11e4-abe2-0002a5d5c51b
D/TC:? 0 ldelf_load_ldelf:110 ldelf load address 0x40007000
D/LD:  ldelf:151 Loading TS 8aaaf200-2450-11e4-abe2-0002a5d5c51b
D/TC:? 0 ldelf_syscall_open_bin:163 Lookup user TA ELF 8aaaf200-2450-11e4-abe2-0002a5d5c51b (early TA)
D/TC:? 0 ldelf_syscall_open_bin:167 res=0
D/LD:  ldelf:185 ELF (8aaaf200-2450-11e4-abe2-0002a5d5c51b) at 0x40084000
D/TA:  TA_CreateEntryPoint:18 has been called
D/TA:  __GP11_TA_OpenSessionEntryPoint:47 has been called
I/TA: Hello World!
Value before: 0x0
Calling TA
D/TA:  inc_value:78 has been called
I/TA: Got value: 0 from NW
I/TA: Increase value to: 1
Value after: 0x1
D/TC:? 0 tee_ta_close_session:469 csess 0x44d2750 id 1
D/TC:? 0 tee_ta_close_session:488 Destroy session
I/TA: Goodbye!
D/TA:  TA_DestroyEntryPoint:29 has been called
D/TC:? 0 destroy_context:326 Destroy TA ctx (0x44d26f0)