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Some CPU vulnerability mitigations may disable AVX functionality on the hardware level via the XCR0 register. We should check that manually to verify that OS actually allows us to use this feature. See https://bugs.kde.org/show_bug.cgi?id=484622 Fix #1025
Ideally the patch CPU detection code should also check if the length of SVE and RVV is actually supported by the current CPU implementation (i.e. ZCR_Elx.LEN register for SVE and something else for RVV), but I don't have such CPUs/emulators handy, so I cannot add such checks. Given that xsimd::available_architectures().has() is a new feature of XSIMD13 and the length check has never been present in XSIMD, this bug is not a regression at least. The patch also adds a unittest that reproduces the error the patch fixes
xsimd is header only library, so prefer arch-independed paths for cmake and pkg-config. References: * xtensor-stack/xtl@d877d94 * xtensor-stack/xtensor@7738389
__builtin_shuffle_vector -> __builtin_shufflevector See https://clang.llvm.org/docs/LanguageExtensions.html#langext-builtin-shufflevector Fix #1033
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