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Merge branch 'master' of github.com:HackerDom/ructf-2023
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lololozhkin committed Nov 3, 2023
2 parents a58cfa7 + 86ec131 commit 088722b
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Showing 5 changed files with 58 additions and 33 deletions.
5 changes: 3 additions & 2 deletions ansible/group_vars/all
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Original file line number Diff line number Diff line change
Expand Up @@ -60,13 +60,14 @@ teams: |
{name => 'BinaryBears', logo => '/logos/team_20.png', network => '10.60.1.0/24', host => '10.60.1.3', token => 'CLOUD_1_a20f03f3173d26044ad174b6829f99c3', tags => ['onsite'] },

services: |
{name => 'example', path => 'checkers/example/example.checker.py', timeout => 30, tcp_port => 2222},
{name => 'funficfy', path => 'checkers/funficfy/funficfy.checker.py', timeout => 30, tcp_port => 1337},
{name => 'hyperborea-legends', path => 'checkers/hyperborea-legends/hyperborea-legends.checker.py', timeout => 30, tcp_port => 42424},
{name => 'memos', path => 'checkers/memos/memos.checker.py', timeout => 30, tcp_port => 17171},
{name => 'perune', path => 'checkers/perune/perune.checker.py', timeout => 30, tcp_port => 18484},
{name => 'rusi-trainer', path => 'checkers/rusi-trainer/rusi-trainer.checker.py', timeout => 30, tcp_port => 41114},
{name => 'rustest', path => 'checkers/rustest/rustest.checker.py', timeout => 30, tcp_port => 13337},
{name => 'sqlfs', path => 'checkers/sqlfs/sqlfs.checker.py', timeout => 30, tcp_port => 22},
{name => 'werk', path => 'checkers/werk/werk.checker.py', timeout => 30, tcp_port => 7654},
{name => 'wise-mystical-tree', path => 'checkers/wise-mystical-tree/wise-mystical-tree.checker.py', timeout => 30, tcp_port => 6174},

queues: |
{}
26 changes: 18 additions & 8 deletions internal/werk/vm/include/arch/instructions.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -44,33 +44,38 @@ namespace werk::vm {
constexpr uint16_t kNonMovThirdOpMask = 0x001c; // 0b0000_0000_0001_1100
constexpr uint16_t kMovFirstOpMask = 0x0780; // 0b0000_0111_1000_0000
constexpr uint16_t kMovSecondOpMask = 0x0078; // 0b0000_0000_0111_1000
constexpr uint16_t kSizeBitMask = 0x0001; // 0b0000_0000_0000_0001
constexpr uint16_t kExtendendArgsMask = 0x0002; // 0b0000_0000_0000_0010
constexpr uint16_t kLoadImmBitMask = 0x0001; // 0b0000_0000_0000_0001

inline int GetOpcode(uint16_t b) {
return (b & kOpcodeNumMask) >> 11;
}

inline bool IsExtendedInstruction(uint16_t b) {
return (b & kSizeBitMask) != 0;
inline bool IsInstructionWithExtendedArgs(uint16_t b) {
return (b & kExtendendArgsMask) != 0;
}

inline int GetNonMovFirstOp(uint16_t b) {
inline bool IsInstructionWithImm(uint16_t b) {
return (b & kLoadImmBitMask) != 0;
}

inline int GetShortInstructionFirstOp(uint16_t b) {
return (b & kNonMovFirstOpMask) >> 8;
}

inline int GetNonMovSecondOp(uint16_t b) {
inline int GetShortInstructionSecondOp(uint16_t b) {
return (b & kNonMovSecondOpMask) >> 5;
}

inline int GetNonMovThirdOp(uint16_t b) {
inline int GetShortInstructionThirdOp(uint16_t b) {
return (b & kNonMovThirdOpMask) >> 2;
}

inline int GetMovFirstOp(uint16_t b) {
inline int GetLongInstructionFirstOp(uint16_t b) {
return (b & kMovFirstOpMask) >> 7;
}

inline int GetMovSecondOp(uint16_t b) {
inline int GetLongInstructionSecondOp(uint16_t b) {
return (b & kMovSecondOpMask) >> 3;
}

Expand All @@ -85,4 +90,9 @@ namespace werk::vm {
opcode == Jle ||
opcode == Jge;
}

inline int IsLongInstruction(Opcode opcode) {
// pc can be set by imm value
return opcode == Mov || IsSetPcInstruction(opcode);
}
}
16 changes: 8 additions & 8 deletions internal/werk/vm/src/vm.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -298,7 +298,7 @@ namespace werk::vm {
return true;
}

bool Vm::call(ParsedInstruction &) {
bool Vm::call(ParsedInstruction &instr) {
return false;
}

Expand Down Expand Up @@ -436,7 +436,7 @@ namespace werk::vm {
}
out.opcode = static_cast<Opcode>(opcode);
out.size = 2;
out.imm.defined = IsExtendedInstruction(firstPart);
out.imm.defined = IsInstructionWithImm(firstPart);

if (out.imm.defined) {
// imm is in out of memory bound
Expand All @@ -447,13 +447,13 @@ namespace werk::vm {
out.size = 4;
}

if (opcode != Opcode::Mov) {
out.operands.first = GetNonMovFirstOp(firstPart);
out.operands.second = GetNonMovSecondOp(firstPart);
out.operands.third = GetNonMovThirdOp(firstPart);
if (IsInstructionWithExtendedArgs(firstPart)) {
out.operands.first = GetLongInstructionFirstOp(firstPart);
out.operands.second = GetLongInstructionSecondOp(firstPart);
} else {
out.operands.first = GetMovFirstOp(firstPart);
out.operands.second = GetMovSecondOp(firstPart);
out.operands.first = GetShortInstructionFirstOp(firstPart);
out.operands.second = GetShortInstructionSecondOp(firstPart);
out.operands.third = GetShortInstructionThirdOp(firstPart);
}

out.setPc = IsSetPcInstruction(static_cast<Opcode>(opcode));
Expand Down
16 changes: 8 additions & 8 deletions internal/werk/vm/tests/instructions_tests.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12,20 +12,20 @@ TEST(Instructions, GetOpcode) {
ASSERT_EQ(GetOpcode(static_cast<uint16_t>(0xffff)), 31);
}

TEST(Instructions, IsExtendedInstruction) {
ASSERT_EQ(IsExtendedInstruction(static_cast<uint16_t>(0xfafe)), false);
ASSERT_EQ(IsExtendedInstruction(static_cast<uint16_t>(0x8101)), true);
TEST(Instructions, IsInstructionWithImm) {
ASSERT_EQ(IsInstructionWithImm(static_cast<uint16_t>(0xfafe)), false);
ASSERT_EQ(IsInstructionWithImm(static_cast<uint16_t>(0x8101)), true);
}

TEST(Instructions, NonMovOps) {
uint16_t b = 0xfd78;
ASSERT_EQ(GetNonMovFirstOp(b), 5);
ASSERT_EQ(GetNonMovSecondOp(b), 3);
ASSERT_EQ(GetNonMovThirdOp(b), 6);
ASSERT_EQ(GetShortInstructionFirstOp(b), 5);
ASSERT_EQ(GetShortInstructionSecondOp(b), 3);
ASSERT_EQ(GetShortInstructionThirdOp(b), 6);
}

TEST(Instructions, MovOps) {
uint16_t b = 0xfd58;
ASSERT_EQ(GetMovFirstOp(b), 10);
ASSERT_EQ(GetMovSecondOp(b), 11);
ASSERT_EQ(GetLongInstructionFirstOp(b), 10);
ASSERT_EQ(GetLongInstructionSecondOp(b), 11);
}
28 changes: 21 additions & 7 deletions internal/werk/vm/tests/vm_tests.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@ TEST(Vm, LoadInstruction) {
[](std::shared_ptr<Vm> v){
ASSERT_EQ(v->registers.v[3], 0xbbaa);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand All @@ -65,6 +66,7 @@ TEST(Vm, LoadInstruction) {
[](std::shared_ptr<Vm> v){
ASSERT_EQ(v->registers.v[0], 0xdead);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand All @@ -82,6 +84,7 @@ TEST(Vm, LoadInstruction) {
[](std::shared_ptr<Vm> v){
ASSERT_EQ(v->registers.v[7], 0xcafe);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand Down Expand Up @@ -122,6 +125,7 @@ TEST(Vm, StoreInstruction) {
ASSERT_EQ(memory[0x1000], 0xad);
ASSERT_EQ(memory[0x1001], 0xde);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand Down Expand Up @@ -150,7 +154,7 @@ TEST(Vm, MovInstruction) {
uint8_t *memory = new uint8_t[kMemorySize];
Defer f([memory]{ delete[] memory; });

uint16_t instructionShort = 0x1008; // mov v0, v1
uint16_t instructionShort = 0x100a; // mov v0, v1
testVmRunInstruction(
memory,
&instructionShort,
Expand All @@ -161,10 +165,11 @@ TEST(Vm, MovInstruction) {
ASSERT_EQ(v->registers.v[1], 0xdead);
ASSERT_EQ(v->registers.v[0], 0xdead);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

instructionShort = 0x1390; // mov v7, v2
instructionShort = 0x1392; // mov v7, v2
testVmRunInstruction(
memory,
&instructionShort,
Expand All @@ -175,10 +180,11 @@ TEST(Vm, MovInstruction) {
ASSERT_EQ(v->registers.v[2], 0xcafe);
ASSERT_EQ(v->registers.v[7], 0xcafe);
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

instructionShort = 0x11c8; // mov v3, reg9 (invalid)
instructionShort = 0x11ca; // mov v3, reg9 (invalid)
testVmRunInstruction(
memory,
&instructionShort,
Expand All @@ -190,7 +196,7 @@ TEST(Vm, MovInstruction) {
}
);

instructionShort = 0x14a0; // mov $imm, v4 (no size bit set)
instructionShort = 0x14a2; // mov $imm, v4 (no size bit set)
testVmRunInstruction(
memory,
&instructionShort,
Expand All @@ -202,7 +208,7 @@ TEST(Vm, MovInstruction) {
}
);

uint8_t instructionLong[] = {0xa1, 0x14, 0xfe, 0xca}; // mov $imm, v4 | 0x14a1cafe
uint8_t instructionLong[] = {0xa3, 0x14, 0xfe, 0xca}; // mov $imm, v4 | 0x14a1cafe
testVmRunInstruction(
memory,
instructionLong,
Expand All @@ -212,10 +218,11 @@ TEST(Vm, MovInstruction) {
[memory](std::shared_ptr<Vm> v){
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.v[4], 0xcafe);
ASSERT_EQ(v->registers.pc, 0x1337 + 4);
}
);

instructionShort = 0x13c0; // mov v7, i
instructionShort = 0x13c2; // mov v7, i
testVmRunInstruction(
memory,
&instructionShort,
Expand All @@ -225,10 +232,11 @@ TEST(Vm, MovInstruction) {
[memory](std::shared_ptr<Vm> v){
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.i, 0xdead);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

instructionShort = 0x17c0; // mov reg15 (invalid), i
instructionShort = 0x17c2; // mov reg15 (invalid), i
testVmRunInstruction(
memory,
&instructionShort,
Expand Down Expand Up @@ -258,6 +266,7 @@ TEST(Vm, PushInstruction) {
ASSERT_EQ(v->registers.sp, 0x88a);
ASSERT_EQ(memory[0x889], 0xad);
ASSERT_EQ(memory[0x88a], 0xde);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand All @@ -274,6 +283,7 @@ TEST(Vm, PushInstruction) {
ASSERT_EQ(v->registers.sp, 0x0);
ASSERT_EQ(memory[0xffff], 0xad);
ASSERT_EQ(memory[0x0000], 0xde);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand All @@ -290,6 +300,7 @@ TEST(Vm, PushInstruction) {
ASSERT_EQ(v->registers.sp, 0x1);
ASSERT_EQ(memory[0x0000], 0xad);
ASSERT_EQ(memory[0x0001], 0xde);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);
}
Expand All @@ -312,6 +323,7 @@ TEST(Vm, PopInstruction) {
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.sp, 0x888);
ASSERT_EQ(v->registers.v[4], 0xdead);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);

Expand All @@ -329,6 +341,7 @@ TEST(Vm, PopInstruction) {
ASSERT_EQ(v->GetStatus(), Vm::Status::Running);
ASSERT_EQ(v->registers.sp, 0xffff);
ASSERT_EQ(v->registers.v[6], 0xdead);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);
}
Expand All @@ -349,6 +362,7 @@ TEST(Vm, ArithInstructions) {
ASSERT_EQ(v->registers.v[1], 0x107a);
ASSERT_EQ(v->registers.v[4], 0xde);
ASSERT_EQ(v->registers.v[5], 0x13);
ASSERT_EQ(v->registers.pc, 0x1337 + 2);
}
);
}

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