added 3 more accelerometers

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_6.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Pin_6.c  
-* Version 1.80
+* Version 1.90
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_6.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Pin_6.h  
-* Version 1.80
+* Version 1.90
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_80 requires cy_boot v3.0 or later
+    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_6_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Pin_6.h  
-* Version 1.80
+* Version 1.90
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_7.c

@@ -0,0 +1,137 @@
+/*******************************************************************************
+* File Name: Pin_7.c  
+* Version 1.90
+*
+* Description:
+*  This file contains API to enable firmware control of a Pins component.
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions, 
+* disclaimers, and limitations in the end user license agreement accompanying 
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#include "cytypes.h"
+#include "Pin_7.h"
+
+/* APIs are not generated for P15[7:6] on PSoC 5 */
+#if !(CY_PSOC5A &&\
+	 Pin_7__PORT == 15 && ((Pin_7__MASK & 0xC0) != 0))
+
+
+/*******************************************************************************
+* Function Name: Pin_7_Write
+********************************************************************************
+*
+* Summary:
+*  Assign a new value to the digital port's data output register.  
+*
+* Parameters:  
+*  prtValue:  The value to be assigned to the Digital Port. 
+*
+* Return: 
+*  None
+*  
+*******************************************************************************/
+void Pin_7_Write(uint8 value) 
+{
+    uint8 staticBits = (Pin_7_DR & (uint8)(~Pin_7_MASK));
+    Pin_7_DR = staticBits | ((uint8)(value << Pin_7_SHIFT) & Pin_7_MASK);
+}
+
+
+/*******************************************************************************
+* Function Name: Pin_7_SetDriveMode
+********************************************************************************
+*
+* Summary:
+*  Change the drive mode on the pins of the port.
+* 
+* Parameters:  
+*  mode:  Change the pins to this drive mode.
+*
+* Return: 
+*  None
+*
+*******************************************************************************/
+void Pin_7_SetDriveMode(uint8 mode) 
+{
+	CyPins_SetPinDriveMode(Pin_7_0, mode);
+}
+
+
+/*******************************************************************************
+* Function Name: Pin_7_Read
+********************************************************************************
+*
+* Summary:
+*  Read the current value on the pins of the Digital Port in right justified 
+*  form.
+*
+* Parameters:  
+*  None
+*
+* Return: 
+*  Returns the current value of the Digital Port as a right justified number
+*  
+* Note:
+*  Macro Pin_7_ReadPS calls this function. 
+*  
+*******************************************************************************/
+uint8 Pin_7_Read(void) 
+{
+    return (Pin_7_PS & Pin_7_MASK) >> Pin_7_SHIFT;
+}
+
+
+/*******************************************************************************
+* Function Name: Pin_7_ReadDataReg
+********************************************************************************
+*
+* Summary:
+*  Read the current value assigned to a Digital Port's data output register
+*
+* Parameters:  
+*  None 
+*
+* Return: 
+*  Returns the current value assigned to the Digital Port's data output register
+*  
+*******************************************************************************/
+uint8 Pin_7_ReadDataReg(void) 
+{
+    return (Pin_7_DR & Pin_7_MASK) >> Pin_7_SHIFT;
+}
+
+
+/* If Interrupts Are Enabled for this Pins component */ 
+#if defined(Pin_7_INTSTAT) 
+
+    /*******************************************************************************
+    * Function Name: Pin_7_ClearInterrupt
+    ********************************************************************************
+    * Summary:
+    *  Clears any active interrupts attached to port and returns the value of the 
+    *  interrupt status register.
+    *
+    * Parameters:  
+    *  None 
+    *
+    * Return: 
+    *  Returns the value of the interrupt status register
+    *  
+    *******************************************************************************/
+    uint8 Pin_7_ClearInterrupt(void) 
+    {
+        return (Pin_7_INTSTAT & Pin_7_MASK) >> Pin_7_SHIFT;
+    }
+
+#endif /* If Interrupts Are Enabled for this Pins component */ 
+
+#endif /* CY_PSOC5A... */
+
+
+/* [] END OF FILE */

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_7.h

@@ -0,0 +1,130 @@
+/*******************************************************************************
+* File Name: Pin_7.h  
+* Version 1.90
+*
+* Description:
+*  This file containts Control Register function prototypes and register defines
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions, 
+* disclaimers, and limitations in the end user license agreement accompanying 
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#if !defined(CY_PINS_Pin_7_H) /* Pins Pin_7_H */
+#define CY_PINS_Pin_7_H
+
+#include "cytypes.h"
+#include "cyfitter.h"
+#include "cypins.h"
+#include "Pin_7_aliases.h"
+
+/* Check to see if required defines such as CY_PSOC5A are available */
+/* They are defined starting with cy_boot v3.0 */
+#if !defined (CY_PSOC5A)
+    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+#endif /* (CY_PSOC5A) */
+
+/* APIs are not generated for P15[7:6] */
+#if !(CY_PSOC5A &&\
+	 Pin_7__PORT == 15 && ((Pin_7__MASK & 0xC0) != 0))
+
+
+/***************************************
+*        Function Prototypes             
+***************************************/    
+
+void    Pin_7_Write(uint8 value) ;
+void    Pin_7_SetDriveMode(uint8 mode) ;
+uint8   Pin_7_ReadDataReg(void) ;
+uint8   Pin_7_Read(void) ;
+uint8   Pin_7_ClearInterrupt(void) ;
+
+
+/***************************************
+*           API Constants        
+***************************************/
+
+/* Drive Modes */
+#define Pin_7_DM_ALG_HIZ         PIN_DM_ALG_HIZ
+#define Pin_7_DM_DIG_HIZ         PIN_DM_DIG_HIZ
+#define Pin_7_DM_RES_UP          PIN_DM_RES_UP
+#define Pin_7_DM_RES_DWN         PIN_DM_RES_DWN
+#define Pin_7_DM_OD_LO           PIN_DM_OD_LO
+#define Pin_7_DM_OD_HI           PIN_DM_OD_HI
+#define Pin_7_DM_STRONG          PIN_DM_STRONG
+#define Pin_7_DM_RES_UPDWN       PIN_DM_RES_UPDWN
+
+/* Digital Port Constants */
+#define Pin_7_MASK               Pin_7__MASK
+#define Pin_7_SHIFT              Pin_7__SHIFT
+#define Pin_7_WIDTH              1u
+
+
+/***************************************
+*             Registers        
+***************************************/
+
+/* Main Port Registers */
+/* Pin State */
+#define Pin_7_PS                     (* (reg8 *) Pin_7__PS)
+/* Data Register */
+#define Pin_7_DR                     (* (reg8 *) Pin_7__DR)
+/* Port Number */
+#define Pin_7_PRT_NUM                (* (reg8 *) Pin_7__PRT) 
+/* Connect to Analog Globals */                                                  
+#define Pin_7_AG                     (* (reg8 *) Pin_7__AG)                       
+/* Analog MUX bux enable */
+#define Pin_7_AMUX                   (* (reg8 *) Pin_7__AMUX) 
+/* Bidirectional Enable */                                                        
+#define Pin_7_BIE                    (* (reg8 *) Pin_7__BIE)
+/* Bit-mask for Aliased Register Access */
+#define Pin_7_BIT_MASK               (* (reg8 *) Pin_7__BIT_MASK)
+/* Bypass Enable */
+#define Pin_7_BYP                    (* (reg8 *) Pin_7__BYP)
+/* Port wide control signals */                                                   
+#define Pin_7_CTL                    (* (reg8 *) Pin_7__CTL)
+/* Drive Modes */
+#define Pin_7_DM0                    (* (reg8 *) Pin_7__DM0) 
+#define Pin_7_DM1                    (* (reg8 *) Pin_7__DM1)
+#define Pin_7_DM2                    (* (reg8 *) Pin_7__DM2) 
+/* Input Buffer Disable Override */
+#define Pin_7_INP_DIS                (* (reg8 *) Pin_7__INP_DIS)
+/* LCD Common or Segment Drive */
+#define Pin_7_LCD_COM_SEG            (* (reg8 *) Pin_7__LCD_COM_SEG)
+/* Enable Segment LCD */
+#define Pin_7_LCD_EN                 (* (reg8 *) Pin_7__LCD_EN)
+/* Slew Rate Control */
+#define Pin_7_SLW                    (* (reg8 *) Pin_7__SLW)
+
+/* DSI Port Registers */
+/* Global DSI Select Register */
+#define Pin_7_PRTDSI__CAPS_SEL       (* (reg8 *) Pin_7__PRTDSI__CAPS_SEL) 
+/* Double Sync Enable */
+#define Pin_7_PRTDSI__DBL_SYNC_IN    (* (reg8 *) Pin_7__PRTDSI__DBL_SYNC_IN) 
+/* Output Enable Select Drive Strength */
+#define Pin_7_PRTDSI__OE_SEL0        (* (reg8 *) Pin_7__PRTDSI__OE_SEL0) 
+#define Pin_7_PRTDSI__OE_SEL1        (* (reg8 *) Pin_7__PRTDSI__OE_SEL1) 
+/* Port Pin Output Select Registers */
+#define Pin_7_PRTDSI__OUT_SEL0       (* (reg8 *) Pin_7__PRTDSI__OUT_SEL0) 
+#define Pin_7_PRTDSI__OUT_SEL1       (* (reg8 *) Pin_7__PRTDSI__OUT_SEL1) 
+/* Sync Output Enable Registers */
+#define Pin_7_PRTDSI__SYNC_OUT       (* (reg8 *) Pin_7__PRTDSI__SYNC_OUT) 
+
+
+#if defined(Pin_7__INTSTAT)  /* Interrupt Registers */
+
+    #define Pin_7_INTSTAT                (* (reg8 *) Pin_7__INTSTAT)
+    #define Pin_7_SNAP                   (* (reg8 *) Pin_7__SNAP)
+
+#endif /* Interrupt Registers */
+
+#endif /* CY_PSOC5A... */
+
+#endif /*  CY_PINS_Pin_7_H */
+
+
+/* [] END OF FILE */

PSOC5_SPI_LSM303D.cydsn/Generated_Source/PSoC5/Pin_7_aliases.h

@@ -0,0 +1,32 @@
+/*******************************************************************************
+* File Name: Pin_7.h  
+* Version 1.90
+*
+* Description:
+*  This file containts Control Register function prototypes and register defines
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions, 
+* disclaimers, and limitations in the end user license agreement accompanying 
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#if !defined(CY_PINS_Pin_7_ALIASES_H) /* Pins Pin_7_ALIASES_H */
+#define CY_PINS_Pin_7_ALIASES_H
+
+#include "cytypes.h"
+#include "cyfitter.h"
+
+
+
+/***************************************
+*              Constants        
+***************************************/
+#define Pin_7_0		Pin_7__0__PC
+
+#endif /* End Pins Pin_7_ALIASES_H */
+
+/* [] END OF FILE */