This is an application note for users wishing to control the caches / MMU on the Cortex A9 devices with in the Xilinx Zynq SoC devices. This version of the application note was written for the Avnet ZedBoard and Avnet MicroZed Board.
The provided example code was written for the Xilinx Vivado 2014.2 tools.
Code examples are provided for your use, but please feel free to contribute your own code back to this repository via a pull request in the usual fashion. Please fork from this repo, then create a suitably named branch in your fork before submitting back to this repo. Please don't submit a pull request from your "master" branch. Each new addition to the code should belong to its own submitted branch. Thanks.