Fix inverted condition

flobernd · flobernd · commit 6481300a585d · 2024-11-03T12:13:27.000+01:00
diff --git a/src/Decoder.c b/src/Decoder.c
@@ -4597,7 +4597,7 @@ static ZyanStatus ZydisPopulateRegisterIds(ZydisDecoderContext* context,
 
     // Validate
 
-    if (instruction->apx.scc != ZYDIS_SCC_NONE)
+    if (instruction->apx.scc == ZYDIS_SCC_NONE)
     {
         // EEVEX SCC instructions re-use `vvvv` as the DFV value and `V4` as the MSB of the SCC
         // code.

Original file line number	Diff line number	Diff line change
`@@ -4597,7 +4597,7 @@ static ZyanStatus ZydisPopulateRegisterIds(ZydisDecoderContext* context,`
`4597`	`4597`
`4598`	`4598`	`// Validate`
`4599`	`4599`
`4600`		`- if (instruction->apx.scc != ZYDIS_SCC_NONE)`
	`4600`	`+ if (instruction->apx.scc == ZYDIS_SCC_NONE)`
`4601`	`4601`	`{`
`4602`	`4602`	// EEVEX SCC instructions re-use `vvvv` as the DFV value and `V4` as the MSB of the SCC
`4603`	`4603`	`// code.`