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spi_mcux_ecspi does not handle transfers with 32 bits. #83332

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voltamund opened this issue Dec 23, 2024 · 1 comment · May be fixed by #83351
Open

spi_mcux_ecspi does not handle transfers with 32 bits. #83332

voltamund opened this issue Dec 23, 2024 · 1 comment · May be fixed by #83351
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bug The issue is a bug, or the PR is fixing a bug platform: NXP Drivers NXP Semiconductors, drivers

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@voltamund
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Describe the bug

Target platform: MIMX8MM6 Cortex M4
I can use the spi_mcux_ecspi driver for transfers where each SPI word is 8 bits. However, it fails if an SPI word is 32 bits.

transfer.dataSize = data->dfs;

for 8 bits dfs will be 1 and the transfers are handled correctly. For 32 bits dfs will be 4 and the transfers will fail.
With the current driver implementation transfer.dataSize should always be 1.

Expected behavior

The spi_mcux_ecspi driver should support transfer sizes up to 32 bits.

Environment (please complete the following information):

  • OS: Linux
  • Toolchain: zephyr-sdk-0.16.8
  • Zephyr Version 3.7.0
@voltamund voltamund added the bug The issue is a bug, or the PR is fixing a bug label Dec 23, 2024
@nordicjm nordicjm added the platform: NXP Drivers NXP Semiconductors, drivers label Dec 23, 2024
@pdgendt
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pdgendt commented Dec 23, 2024

This driver can be improved a lot, especially if DMA would be added, feel free to send a PR for the 32 bit support.

@pdgendt pdgendt linked a pull request Dec 24, 2024 that will close this issue
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Labels
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7 participants