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spi_mcux_ecspi does not handle gpio chipselect correctly #83331

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voltamund opened this issue Dec 23, 2024 · 2 comments · May be fixed by #83351
Open

spi_mcux_ecspi does not handle gpio chipselect correctly #83331

voltamund opened this issue Dec 23, 2024 · 2 comments · May be fixed by #83351
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bug The issue is a bug, or the PR is fixing a bug platform: NXP Drivers NXP Semiconductors, drivers

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@voltamund
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Describe the bug

Target platform: MIMX8MM6 Cortex M4
If I use more than 4 gpios in the spi node's cs-gpios the driver it will not handle gpio with index > 3.

if (spi_cfg->slave > kECSPI_Channel3) {

will fail. If the spi node uses cs-gpios it should just use kECSPI_Channel0. I am not even sure that using something like kECSPI_Channel3 will work for the built-in cs.

Expected behavior
SPI transfer with cs-gpios index > 3 succeeds

Logs and console output
Slave 4 is greater than 3

Environment (please complete the following information):

  • OS: Linux
  • Toolchain: zephyr-sdk-0.16.8
  • Zephyr Version 3.7.0
@voltamund voltamund added the bug The issue is a bug, or the PR is fixing a bug label Dec 23, 2024
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Hi @voltamund! We appreciate you submitting your first issue for our open-source project. 🌟

Even though I'm a bot, I can assure you that the whole community is genuinely grateful for your time and effort. 🤖💙

@pdgendt
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pdgendt commented Dec 24, 2024

You are correct, moreover this the case in many driver implementations. An index is needed and used to select the corresponding "hard-wired" chip-select OR the corresponding GPIO.
Attempting to support both cases in the same driver has led to this limitation, sadly.

@pdgendt pdgendt linked a pull request Dec 24, 2024 that will close this issue
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Labels
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7 participants