From 3bab2dfa21d5b677b42ed63379a7243accc3c1bd Mon Sep 17 00:00:00 2001 From: Asgeir Stavik Hustad Date: Sun, 8 Sep 2024 14:19:38 +0200 Subject: [PATCH] samv71b: patch: Fix SMC struct naming. This commit patches the incorrect SMC struct name. Signed-off-by: Asgeir Stavik Hustad --- asf/sam/include/samv71b/README | 1 + asf/sam/include/samv71b/component/smc.h | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/asf/sam/include/samv71b/README b/asf/sam/include/samv71b/README index 04aff323..5751c5d0 100644 --- a/asf/sam/include/samv71b/README +++ b/asf/sam/include/samv71b/README @@ -39,5 +39,6 @@ License Link: https://www.apache.org/licenses/LICENSE-2.0 Patch List: + * Fix SmcCs struct naming. * Fix QDEC deprecated symbols. * Fix XDMAC_CHID register name. diff --git a/asf/sam/include/samv71b/component/smc.h b/asf/sam/include/samv71b/component/smc.h index 6e395f55..de0f5848 100644 --- a/asf/sam/include/samv71b/component/smc.h +++ b/asf/sam/include/samv71b/component/smc.h @@ -372,12 +372,12 @@ typedef struct { __IO uint32_t SMC_PULSE; /**< (SMC_CS_NUMBER Offset: 0x04) SMC Pulse Register */ __IO uint32_t SMC_CYCLE; /**< (SMC_CS_NUMBER Offset: 0x08) SMC Cycle Register */ __IO uint32_t SMC_MODE; /**< (SMC_CS_NUMBER Offset: 0x0C) SMC Mode Register */ -} SmcCsNumber; +} SmcCs_number; -#define SMCCSNUMBER_NUMBER 4 +#define SMCCS_NUMBER_NUMBER 4 /** \brief SMC hardware registers */ typedef struct { - SmcCsNumber SmcCsNumber[SMCCSNUMBER_NUMBER]; /**< Offset: 0x00 SMC Setup Register */ + SmcCs_number SMC_CS_NUMBER[SMCCS_NUMBER_NUMBER]; /**< Offset: 0x00 SMC Setup Register */ __I uint8_t Reserved1[64]; __IO uint32_t SMC_OCMS; /**< (SMC Offset: 0x80) SMC Off-Chip Memory Scrambling Register */ __O uint32_t SMC_KEY1; /**< (SMC Offset: 0x84) SMC Off-Chip Memory Scrambling KEY1 Register */ @@ -394,11 +394,11 @@ typedef struct { __IO SMC_PULSE_Type SMC_PULSE; /**< Offset: 0x04 (R/W 32) SMC Pulse Register */ __IO SMC_CYCLE_Type SMC_CYCLE; /**< Offset: 0x08 (R/W 32) SMC Cycle Register */ __IO SMC_MODE_Type SMC_MODE; /**< Offset: 0x0C (R/W 32) SMC Mode Register */ -} SmcCsNumber; +} SmcCs_number; /** \brief SMC hardware registers */ typedef struct { - SmcCsNumber SmcCsNumber[4]; /**< Offset: 0x00 SMC Setup Register */ + SmcCs_number SMC_CS_NUMBER[4]; /**< Offset: 0x00 SMC Setup Register */ __I uint8_t Reserved1[64]; __IO SMC_OCMS_Type SMC_OCMS; /**< Offset: 0x80 (R/W 32) SMC Off-Chip Memory Scrambling Register */ __O SMC_KEY1_Type SMC_KEY1; /**< Offset: 0x84 ( /W 32) SMC Off-Chip Memory Scrambling KEY1 Register */